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* Attach Meson64 to mainline with a bunch of patches. Tested, but need further work. * Enable DVFS on N2 which sometimes works, sometime doesn't, cleanup * Enable beta targets for Meson64 kernel family * Bump with version
410 lines
12 KiB
Diff
410 lines
12 KiB
Diff
From 0db50d02afc25b60e6a43d7f4df7eb83077849fb Mon Sep 17 00:00:00 2001
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From: Jerome Brunet <jbrunet@baylibre.com>
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Date: Tue, 22 Oct 2019 17:56:56 +0200
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Subject: [PATCH 53/94] WIP: ASoC: meson: aiu: add spdif encoder support
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Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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---
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sound/soc/meson/Kconfig | 9 +
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sound/soc/meson/Makefile | 2 +
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sound/soc/meson/aiu-spdif-encode.c | 348 +++++++++++++++++++++++++++++++++++++
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3 files changed, 359 insertions(+)
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create mode 100644 sound/soc/meson/aiu-spdif-encode.c
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diff --git a/sound/soc/meson/Kconfig b/sound/soc/meson/Kconfig
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index 562d960..8028d6b 100644
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--- a/sound/soc/meson/Kconfig
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+++ b/sound/soc/meson/Kconfig
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@@ -34,6 +34,15 @@ config SND_MESON_AIU_I2S_ENCODER
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help
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Select Y or M to add support for i2s Encoder of the GXL family
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+config SND_MESON_AIU_SPDIF_ENCODER
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+ tristate "Amlogic AIU SPDIF Encoder"
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+ imply SND_MESON_AIU_SPDIF_FIFO
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+ imply SND_MESON_AIU_BUS
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+ select SND_PCM_IEC958
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+ select MFD_SYSCON
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+ help
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+ Select Y or M to add support for spdif Encoder of the GXL family
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+
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config SND_MESON_AXG_FIFO
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tristate
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select REGMAP_MMIO
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diff --git a/sound/soc/meson/Makefile b/sound/soc/meson/Makefile
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index cfbe404..5309af8 100644
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--- a/sound/soc/meson/Makefile
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+++ b/sound/soc/meson/Makefile
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@@ -5,6 +5,7 @@ snd-soc-meson-aiu-fifo-objs := aiu-fifo.o
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snd-soc-meson-aiu-i2s-fifo-objs := aiu-i2s-fifo.o
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snd-soc-meson-aiu-spdif-fifo-objs := aiu-spdif-fifo.o
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snd-soc-meson-aiu-i2s-encode-objs := aiu-i2s-encode.o
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+snd-soc-meson-aiu-spdif-encode-objs := aiu-spdif-encode.o
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snd-soc-meson-axg-fifo-objs := axg-fifo.o
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snd-soc-meson-axg-frddr-objs := axg-frddr.o
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snd-soc-meson-axg-toddr-objs := axg-toddr.o
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@@ -26,6 +27,7 @@ obj-$(CONFIG_SND_MESON_AIU_FIFO) += snd-soc-meson-aiu-fifo.o
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obj-$(CONFIG_SND_MESON_AIU_I2S_FIFO) += snd-soc-meson-aiu-i2s-fifo.o
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obj-$(CONFIG_SND_MESON_AIU_SPDIF_FIFO) += snd-soc-meson-aiu-spdif-fifo.o
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obj-$(CONFIG_SND_MESON_AIU_I2S_ENCODER) += snd-soc-meson-aiu-i2s-encode.o
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+obj-$(CONFIG_SND_MESON_AIU_SPDIF_ENCODER) += snd-soc-meson-aiu-spdif-encode.o
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obj-$(CONFIG_SND_MESON_AXG_FIFO) += snd-soc-meson-axg-fifo.o
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obj-$(CONFIG_SND_MESON_AXG_FRDDR) += snd-soc-meson-axg-frddr.o
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obj-$(CONFIG_SND_MESON_AXG_TODDR) += snd-soc-meson-axg-toddr.o
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diff --git a/sound/soc/meson/aiu-spdif-encode.c b/sound/soc/meson/aiu-spdif-encode.c
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new file mode 100644
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index 0000000..92b1011
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--- /dev/null
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+++ b/sound/soc/meson/aiu-spdif-encode.c
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@@ -0,0 +1,348 @@
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+// SPDX-License-Identifier: GPL-2.0
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+//
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+// Copyright (c) 2018 BayLibre, SAS.
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+// Author: Jerome Brunet <jbrunet@baylibre.com>
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+
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+#include <linux/bitfield.h>
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+#include <linux/clk.h>
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+#include <linux/mfd/syscon.h>
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+#include <linux/module.h>
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+#include <linux/of_platform.h>
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+#include <sound/pcm_params.h>
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+#include <sound/pcm_iec958.h>
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+#include <sound/soc.h>
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+#include <sound/soc-dai.h>
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+
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+#define AIU_958_MISC 0x010
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+#define AIU_958_MISC_NON_PCM BIT(0)
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+#define AIU_958_MISC_MODE_16BITS BIT(1)
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+#define AIU_958_MISC_16BITS_ALIGN GENMASK(6, 5)
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+#define AIU_958_MISC_MODE_32BITS BIT(7)
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+#define AIU_958_MISC_U_FROM_STREAM BIT(12)
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+#define AIU_958_MISC_FORCE_LR BIT(13)
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+#define AIU_958_CHSTAT_L0 0x020
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+#define AIU_958_CHSTAT_L1 0x024
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+#define AIU_958_CTRL 0x028
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+#define AIU_958_CTRL_HOLD_EN BIT(0)
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+#define AIU_I2S_MISC 0x048
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+#define AIU_I2S_MISC_958_SRC_SHIFT 3
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+#define AIU_CLK_CTRL 0x058
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+#define AIU_CLK_CTRL_958_DIV_EN BIT(1)
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+#define AIU_CLK_CTRL_958_DIV GENMASK(5, 4)
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+#define AIU_CLK_CTRL_958_DIV_MORE BIT(12)
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+#define AIU_958_CHSTAT_R0 0x0c0
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+#define AIU_958_CHSTAT_R1 0x0c4
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+
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+#define AIU_CS_WORD_LEN 4
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+#define AIU_958_INTERNAL_DIV 2
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+
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+struct aiu_spdif_encode {
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+ struct clk *mclk_i958;
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+ struct clk *mclk_i2s;
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+ struct clk *mclk;
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+ struct clk *pclk;
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+};
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+
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+static void aiu_spdif_encode_divider_enable(struct snd_soc_component *component,
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+ bool enable)
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+{
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+ snd_soc_component_update_bits(component, AIU_CLK_CTRL,
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+ AIU_CLK_CTRL_958_DIV_EN,
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+ enable ? AIU_CLK_CTRL_958_DIV_EN : 0);
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+}
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+
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+static void aiu_spdif_encode_hold(struct snd_soc_component *component,
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+ bool enable)
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+{
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+ snd_soc_component_update_bits(component, AIU_958_CTRL,
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+ AIU_958_CTRL_HOLD_EN,
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+ enable ? AIU_958_CTRL_HOLD_EN : 0);
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+}
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+
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+static int aiu_spdif_encode_trigger(struct snd_pcm_substream *substream, int cmd,
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+ struct snd_soc_dai *dai)
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+{
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+ struct snd_soc_component *component = dai->component;
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+
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+ switch (cmd) {
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+ case SNDRV_PCM_TRIGGER_START:
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+ case SNDRV_PCM_TRIGGER_RESUME:
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+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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+ aiu_spdif_encode_hold(component, false);
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+ return 0;
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+
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+ case SNDRV_PCM_TRIGGER_STOP:
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+ case SNDRV_PCM_TRIGGER_SUSPEND:
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+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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+ aiu_spdif_encode_hold(component, true);
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+ return 0;
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+
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+ default:
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+ return -EINVAL;
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+ }
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+}
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+
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+static int aiu_spdif_encode_setup_cs_word(struct snd_soc_component *component,
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+ struct snd_pcm_hw_params *params)
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+{
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+ u8 cs[AIU_CS_WORD_LEN];
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+ unsigned int val;
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+ int ret;
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+
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+ ret = snd_pcm_create_iec958_consumer_hw_params(params, cs,
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+ AIU_CS_WORD_LEN);
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+ if (ret < 0)
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+ return ret;
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+
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+ /* Write the 1st half word */
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+ val = cs[1] | cs[0] << 8;
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+ snd_soc_component_write(component, AIU_958_CHSTAT_L0, val);
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+ snd_soc_component_write(component, AIU_958_CHSTAT_R0, val);
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+
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+ /* Write the 2nd half word */
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+ val = cs[3] | cs[2] << 8;
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+ snd_soc_component_write(component, AIU_958_CHSTAT_L1, val);
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+ snd_soc_component_write(component, AIU_958_CHSTAT_R1, val);
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+
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+ return 0;
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+}
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+
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+static int aiu_spdif_encode_hw_params(struct snd_pcm_substream *substream,
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+ struct snd_pcm_hw_params *params,
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+ struct snd_soc_dai *dai)
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+{
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+ struct snd_soc_component *component = dai->component;
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+ struct aiu_spdif_encode *encoder = snd_soc_dai_get_drvdata(dai);
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+ unsigned int val = 0, mrate;
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+ int ret;
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+
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+ /* Disable the clock while changing the settings */
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+ aiu_spdif_encode_divider_enable(component, false);
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+
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+ switch (params_physical_width(params)) {
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+ case 16:
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+ val |= AIU_958_MISC_MODE_16BITS;
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+ val |= FIELD_PREP(AIU_958_MISC_16BITS_ALIGN, 2);
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+ break;
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+ case 32:
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+ val |= AIU_958_MISC_MODE_32BITS;
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+ break;
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+ default:
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+ dev_err(dai->dev, "Unsupport physical width\n");
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+ return -EINVAL;
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+ }
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+
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+ snd_soc_component_update_bits(component, AIU_958_MISC,
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+ AIU_958_MISC_NON_PCM |
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+ AIU_958_MISC_MODE_16BITS |
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+ AIU_958_MISC_16BITS_ALIGN |
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+ AIU_958_MISC_MODE_32BITS |
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+ AIU_958_MISC_FORCE_LR |
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+ AIU_958_MISC_U_FROM_STREAM,
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+ val);
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+
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+ /* Set the stream channel status word */
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+ ret = aiu_spdif_encode_setup_cs_word(component, params);
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+ if (ret) {
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+ dev_err(dai->dev, "failed to set channel status word\n");
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+ return ret;
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+ }
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+
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+ snd_soc_component_update_bits(component, AIU_CLK_CTRL,
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+ AIU_CLK_CTRL_958_DIV |
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+ AIU_CLK_CTRL_958_DIV_MORE,
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+ FIELD_PREP(AIU_CLK_CTRL_958_DIV,
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+ __ffs(AIU_958_INTERNAL_DIV)));
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+
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+ /* 2 * 32bits per subframe * 2 channels = 128 */
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+ mrate = params_rate(params) * 128 * AIU_958_INTERNAL_DIV;
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+ ret = clk_set_rate(encoder->mclk, mrate);
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+ if (ret) {
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+ dev_err(dai->dev, "failed to set mclk rate\n");
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+ return ret;
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+ }
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+
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+ aiu_spdif_encode_divider_enable(component, true);
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+
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+ return 0;
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+}
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+
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+static int aiu_spdif_encode_hw_free(struct snd_pcm_substream *substream,
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+ struct snd_soc_dai *dai)
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+{
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+ struct snd_soc_component *component = dai->component;
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+
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+ aiu_spdif_encode_divider_enable(component, false);
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+
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+ return 0;
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+}
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+
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+static int aiu_spdif_encode_startup(struct snd_pcm_substream *substream,
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+ struct snd_soc_dai *dai)
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+{
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+ struct aiu_spdif_encode *encoder = snd_soc_dai_get_drvdata(dai);
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+ int ret;
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+
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+ /* make sure the spdif block is on its own divider */
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+ ret = clk_set_parent(encoder->mclk, encoder->mclk_i958);
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+ if (ret)
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+ return ret;
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+
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+ ret = clk_prepare_enable(encoder->pclk);
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+ if (ret)
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+ return ret;
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+
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+ ret = clk_prepare_enable(encoder->mclk);
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+ if (ret)
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+ clk_disable_unprepare(encoder->pclk);
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+
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+ return ret;
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+}
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+
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+static void aiu_spdif_encode_shutdown(struct snd_pcm_substream *substream,
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+ struct snd_soc_dai *dai)
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+{
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+ struct aiu_spdif_encode *encoder = snd_soc_dai_get_drvdata(dai);
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+
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+ clk_disable_unprepare(encoder->mclk);
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+ clk_disable_unprepare(encoder->pclk);
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+}
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+
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+static const struct snd_soc_dai_ops aiu_spdif_encode_dai_ops = {
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+ .trigger = aiu_spdif_encode_trigger,
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+ .hw_params = aiu_spdif_encode_hw_params,
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+ .hw_free = aiu_spdif_encode_hw_free,
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+ .startup = aiu_spdif_encode_startup,
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+ .shutdown = aiu_spdif_encode_shutdown,
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+};
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+
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+static struct snd_soc_dai_driver aiu_spdif_encode_dai_drv = {
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+ .playback = {
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+ .stream_name = "Playback",
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+ .channels_min = 2,
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+ .channels_max = 2,
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+ .rates = (SNDRV_PCM_RATE_32000 |
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+ SNDRV_PCM_RATE_44100 |
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+ SNDRV_PCM_RATE_48000 |
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+ SNDRV_PCM_RATE_88200 |
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+ SNDRV_PCM_RATE_96000 |
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+ SNDRV_PCM_RATE_176400 |
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+ SNDRV_PCM_RATE_192000),
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+ .formats = (SNDRV_PCM_FMTBIT_S16_LE |
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+ SNDRV_PCM_FMTBIT_S20_LE |
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+ SNDRV_PCM_FMTBIT_S24_LE),
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+ },
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+ .ops = &aiu_spdif_encode_dai_ops,
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+};
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+
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+int aiu_spdif_encode_component_probe(struct snd_soc_component *component)
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+{
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+ struct device *dev = component->dev;
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+ struct regmap *map;
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+
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+ map = syscon_node_to_regmap(dev->parent->of_node);
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+ if (IS_ERR(map)) {
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+ dev_err(dev, "Could not get regmap\n");
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+ return PTR_ERR(map);
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+ }
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+
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+ snd_soc_component_init_regmap(component, map);
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+
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+ return 0;
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+}
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+
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+static const char * const aiu_spdif_encode_sel_texts[] = {
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+ "SPDIF", "I2S",
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+};
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+
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+static SOC_ENUM_SINGLE_DECL(aiu_spdif_encode_sel_enum, AIU_I2S_MISC,
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+ AIU_I2S_MISC_958_SRC_SHIFT,
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+ aiu_spdif_encode_sel_texts);
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+
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+static const struct snd_kcontrol_new aiu_spdif_encode_mux =
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+ SOC_DAPM_ENUM("Buffer Src", aiu_spdif_encode_sel_enum);
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+
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+static const struct snd_soc_dapm_widget aiu_spdif_encode_dapm_widgets[] = {
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+ SND_SOC_DAPM_AIF_IN("SPDIF IN", NULL, 0, SND_SOC_NOPM, 0, 0),
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+ SND_SOC_DAPM_AIF_IN("I2S IN", NULL, 0, SND_SOC_NOPM, 0, 0),
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+ SND_SOC_DAPM_MUX("SRC SEL", SND_SOC_NOPM, 0, 0, &aiu_spdif_encode_mux),
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+};
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+
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+static const struct snd_soc_dapm_route aiu_spdif_encode_dapm_routes[] = {
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+ { "SRC SEL", "SPDIF", "SPDIF IN" },
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+ { "SRC SEL", "I2S", "I2S IN" },
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+ { "Playback", NULL, "SRC SEL" },
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+};
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+
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+static const struct snd_soc_component_driver aiu_spdif_encode_component = {
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+ .dapm_widgets = aiu_spdif_encode_dapm_widgets,
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+ .num_dapm_widgets = ARRAY_SIZE(aiu_spdif_encode_dapm_widgets),
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+ .dapm_routes = aiu_spdif_encode_dapm_routes,
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+ .num_dapm_routes = ARRAY_SIZE(aiu_spdif_encode_dapm_routes),
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+ .probe = aiu_spdif_encode_component_probe,
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+};
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+
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+static int aiu_spdif_encode_probe(struct platform_device *pdev)
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+{
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+ struct device *dev = &pdev->dev;
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+ struct aiu_spdif_encode *encoder;
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+
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+ encoder = devm_kzalloc(dev, sizeof(*encoder), GFP_KERNEL);
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+ if (!encoder)
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+ return -ENOMEM;
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+ platform_set_drvdata(pdev, encoder);
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+
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+ encoder->pclk = devm_clk_get(dev, "pclk");
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+ if (IS_ERR(encoder->pclk)) {
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+ if (PTR_ERR(encoder->pclk) != -EPROBE_DEFER)
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+ dev_err(dev,
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+ "Can't get the dai clock gate\n");
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+ return PTR_ERR(encoder->pclk);
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+ }
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+
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+ encoder->mclk_i958 = devm_clk_get(dev, "mclk_i958");
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+ if (IS_ERR(encoder->mclk_i958)) {
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+ if (PTR_ERR(encoder->mclk_i958) != -EPROBE_DEFER)
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+ dev_err(dev, "Can't get the spdif master clock\n");
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+ return PTR_ERR(encoder->mclk_i958);
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+ }
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+
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+ /*
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+ * NOTE: the spdif can be clock by i2s master clock or its own clock,
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+ * We should (maybe) change the source depending on the origin of the
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+ * data.
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+ * However, considering the clocking scheme used on these platforms,
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+ * the master clocks should pick the same PLL source when they are
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+ * playing from the same FIFO. The clock should be in sync so, it
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+ * should not be necessary to reparent the spdif master clock.
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+ */
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+
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+ encoder->mclk = devm_clk_get(dev, "mclk");
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+ if (IS_ERR(encoder->mclk)) {
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+ if (PTR_ERR(encoder->mclk) != -EPROBE_DEFER)
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+ dev_err(dev, "Can't get the spdif input mux clock\n");
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+ return PTR_ERR(encoder->mclk);
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+ }
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+
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+ return devm_snd_soc_register_component(dev, &aiu_spdif_encode_component,
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+ &aiu_spdif_encode_dai_drv, 1);
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+}
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+
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+static const struct of_device_id aiu_spdif_encode_of_match[] = {
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+ { .compatible = "amlogic,aiu-spdif-encode", },
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+ {}
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+};
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+MODULE_DEVICE_TABLE(of, aiu_spdif_encode_of_match);
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+
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+static struct platform_driver aiu_spdif_encode_pdrv = {
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+ .probe = aiu_spdif_encode_probe,
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+ .driver = {
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+ .name = "meson-aiu-spdif-encode",
|
|
+ .of_match_table = aiu_spdif_encode_of_match,
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+ },
|
|
+};
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+module_platform_driver(aiu_spdif_encode_pdrv);
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+
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+MODULE_DESCRIPTION("Meson AIU SPDIF Encode Driver");
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+MODULE_AUTHOR("Jerome Brunet <jbrunet@baylibre.com>");
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+MODULE_LICENSE("GPL v2");
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|
--
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2.7.1
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|