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31 lines
901 B
Diff
31 lines
901 B
Diff
From 0eb5b137e2cc8daeef7bb3a56c42e104510953a7 Mon Sep 17 00:00:00 2001
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From: Jerome Brunet <jbrunet@baylibre.com>
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Date: Tue, 14 Feb 2017 14:09:48 +0100
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Subject: [PATCH 69/93] clk: meson: mpll: correct N2 maximum value
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Documentation say N2 maximum value is 127 but the register field
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is 9 bits wide, the maximum value should 511.
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Test shows value greater than 127 works well
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Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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---
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drivers/clk/meson/clk-mpll.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/drivers/clk/meson/clk-mpll.c b/drivers/clk/meson/clk-mpll.c
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index d4ba8cd..ce48f65 100644
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--- a/drivers/clk/meson/clk-mpll.c
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+++ b/drivers/clk/meson/clk-mpll.c
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@@ -68,7 +68,7 @@
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#define SDM_MIN 1
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#define SDM_MAX 16383
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#define N2_MIN 4
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-#define N2_MAX 127
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+#define N2_MAX 511
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#define to_meson_clk_mpll(_hw) container_of(_hw, struct meson_clk_mpll, hw)
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--
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1.9.1
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