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83 lines
3 KiB
Diff
83 lines
3 KiB
Diff
From 8fb0058965b30a39f1e0e3820b96013cfbf6bfc6 Mon Sep 17 00:00:00 2001
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From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
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Date: Tue, 17 Jan 2017 10:29:01 +0200
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Subject: [PATCH 21/93] drm: bridge: dw-hdmi: Remove PHY configuration
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resolution parameter
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The current code hard codes the call of hdmi_phy_configure() to be 8bpp
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and provides extraneous error checking to verify that this hardcoded
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value is correct. Simplify the implementation by removing the argument.
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Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
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Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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Reviewed-by: Jose Abreu <joabreu@synopsys.com>
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Signed-off-by: Archit Taneja <architt@codeaurora.org>
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Link: http://patchwork.freedesktop.org/patch/msgid/20170117082910.27023-12-laurent.pinchart+renesas@ideasonboard.com
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---
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drivers/gpu/drm/bridge/dw-hdmi.c | 27 +++++----------------------
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1 file changed, 5 insertions(+), 22 deletions(-)
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diff --git a/drivers/gpu/drm/bridge/dw-hdmi.c b/drivers/gpu/drm/bridge/dw-hdmi.c
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index 107fea4..b4fb0bd 100644
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--- a/drivers/gpu/drm/bridge/dw-hdmi.c
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+++ b/drivers/gpu/drm/bridge/dw-hdmi.c
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@@ -930,31 +930,14 @@ static void dw_hdmi_phy_sel_interface_control(struct dw_hdmi *hdmi, u8 enable)
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HDMI_PHY_CONF0_SELDIPIF_MASK);
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}
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-static int hdmi_phy_configure(struct dw_hdmi *hdmi,
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- unsigned char res, int cscon)
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+static int hdmi_phy_configure(struct dw_hdmi *hdmi, int cscon)
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{
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- unsigned res_idx;
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u8 val, msec;
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const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
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const struct dw_hdmi_mpll_config *mpll_config = pdata->mpll_cfg;
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const struct dw_hdmi_curr_ctrl *curr_ctrl = pdata->cur_ctr;
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const struct dw_hdmi_phy_config *phy_config = pdata->phy_config;
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- switch (res) {
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- case 0: /* color resolution 0 is 8 bit colour depth */
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- case 8:
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- res_idx = DW_HDMI_RES_8;
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- break;
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- case 10:
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- res_idx = DW_HDMI_RES_10;
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- break;
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- case 12:
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- res_idx = DW_HDMI_RES_12;
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- break;
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- default:
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- return -EINVAL;
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- }
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-
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/* PLL/MPLL Cfg - always match on final entry */
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for (; mpll_config->mpixelclock != ~0UL; mpll_config++)
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if (hdmi->hdmi_data.video_mode.mpixelclock <=
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@@ -1004,11 +987,11 @@ static int hdmi_phy_configure(struct dw_hdmi *hdmi,
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HDMI_PHY_I2CM_SLAVE_ADDR);
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hdmi_phy_test_clear(hdmi, 0);
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- hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].cpce, 0x06);
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- hdmi_phy_i2c_write(hdmi, mpll_config->res[res_idx].gmp, 0x15);
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+ hdmi_phy_i2c_write(hdmi, mpll_config->res[0].cpce, 0x06);
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+ hdmi_phy_i2c_write(hdmi, mpll_config->res[0].gmp, 0x15);
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/* CURRCTRL */
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- hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[res_idx], 0x10);
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+ hdmi_phy_i2c_write(hdmi, curr_ctrl->curr[0], 0x10);
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hdmi_phy_i2c_write(hdmi, 0x0000, 0x13); /* PLLPHBYCTRL */
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hdmi_phy_i2c_write(hdmi, 0x0006, 0x17);
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@@ -1068,7 +1051,7 @@ static int dw_hdmi_phy_init(struct dw_hdmi *hdmi)
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dw_hdmi_phy_enable_powerdown(hdmi, true);
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/* Enable CSC */
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- ret = hdmi_phy_configure(hdmi, 8, cscon);
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+ ret = hdmi_phy_configure(hdmi, cscon);
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if (ret)
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return ret;
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}
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--
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1.9.1
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