build/patch/kernel/sunxi-current/sunxi-h5-add-gpio-regulator-overclock.patch
Igor Pečovnik 150ac0c2af
Remove K<4, change branches, new features (#1586)
AR-1 - Adding support category for distributions
AR-4 - Remove Allwinner legacy
AR-5 - Drop Udoo family and move Udoo board into newly created imx6 family
AR-9 - Rename sunxi-next to sunxi-legacy
AR-10 - Rename sunxi-dev to sunxi-current
AR-11 - Adding Radxa Rockpi S support
AR-13 - Rename rockchip64-default to rockchip64-legacy
AR-14 - Add rockchip64-current as mainline source
AR-15 - Drop Rockchip 4.19.y NEXT, current become 5.3.y
AR-16 - Rename RK3399 default to legacy
AR-17 - Rename Odroid XU4 next and default to legacy 4.14.y, add DEV 5.4.y
AR-18 - Add Odroid N2 current mainline
AR-19 - Move Odroid C1 to meson family
AR-20 - Rename mvebu64-default to mvebu64-legacy
AR-21 - Rename mvebu-default to mvebu-legacy
AR-22 - Rename mvebu-next to mvebu-current
AR-23 - Drop meson64 default and next, current becomes former DEV 5.3.y
AR-24 - Drop cubox family and move Cubox/Hummingboard boards under imx6
AR-26 - Adjust motd
AR-27 - Enabling distribution release status
AR-28 - Added new GCC compilers
AR-29 - Implementing Ubuntu Eoan
AR-30 - Add desktop packages per board or family
AR-31 - Remove (Ubuntu/Debian) distribution name from image filename
AR-32 - Move arch configs from configuration.sh to separate arm64 and armhf config files
AR-33 - Revision numbers for beta builds changed to day_in_the_year
AR-34 - Patches support linked patches
AR-35 - Break meson64 family into gxbb and gxl
AR-36 - Add Nanopineo2 Black
AR-38 - Upgrade option from old branches to new one via armbian-config
AR-41 - Show full timezone info
AR-43 - Merge Odroid N2 to meson64
AR-44 - Enable FORCE_BOOTSCRIPT_UPDATE for all builds
2019-11-19 23:25:39 +01:00

162 lines
4.4 KiB
Diff

diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 128d32cbe..5227b9741 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -13,6 +13,9 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-w1-gpio.dtbo \
sun50i-h5-analog-codec.dtbo \
sun50i-h5-cir.dtbo \
+ sun50i-h5-cpu-clock-1.0GHz-1.1v.dtbo \
+ sun50i-h5-cpu-clock-1.3GHz-1.3v.dtbo \
+ sun50i-h5-gpio-regulator-1.3v.dtbo \
sun50i-h5-i2c0.dtbo \
sun50i-h5-i2c1.dtbo \
sun50i-h5-i2c2.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts
new file mode 100644
index 000000000..a8079e825
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.0GHz at a maximum CPU voltage of 1.1v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
new file mode 100644
index 000000000..ed0d9ac63
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
@@ -0,0 +1,61 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
new file mode 100644
index 000000000..8d2755c3d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
@@ -0,0 +1,38 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+
+ fragment@0 {
+ target-path = "/";
+
+ __overlay__ {
+ reg_vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 0>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&cpu0>;
+
+ __overlay__ {
+ cpu-supply = <&reg_vdd_cpux>;
+ };
+ };
+};
+