build/patch/kernel/sunxi-dev/board-a64-v3-01-19-arm64-dts-allwinner-a64-Add-L2-cache-nodes.patch

42 lines
1,001 B
Diff

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index d3daf90a8715..934d7e87fa08 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -134,6 +134,7 @@
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
+ next-level-cache = <&L2>;
};
cpu1: cpu@1 {
@@ -142,6 +143,7 @@
reg = <1>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
+ next-level-cache = <&L2>;
};
cpu2: cpu@2 {
@@ -150,6 +152,7 @@
reg = <2>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
+ next-level-cache = <&L2>;
};
cpu3: cpu@3 {
@@ -158,7 +161,13 @@
reg = <3>;
enable-method = "psci";
operating-points-v2 = <&cpu0_opp_table>;
+ next-level-cache = <&L2>;
};
+
+ L2: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ };
};
de: display-engine {