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50 lines
1.6 KiB
Diff
50 lines
1.6 KiB
Diff
From 0aef27cab880d9612331350c008aec00cbb3d247 Mon Sep 17 00:00:00 2001
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From: Marcus Cooper <codekipper@gmail.com>
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Date: Sat, 12 Aug 2017 13:00:49 +0200
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Subject: ASoC: sun4i-i2s: Add clkdiv offsets to quirks
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The BCLKDIV and MCLKDIV found on newer SoCs start from an offset of 1.
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Add the functionality to adjust the division values according to the
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needs to the device being used.
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Signed-off-by: Marcus Cooper <codekipper@gmail.com>
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Reviewed-by: Chen-Yu Tsai <wens@csie.org>
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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sound/soc/sunxi/sun4i-i2s.c | 8 ++++++++
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1 file changed, 8 insertions(+)
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(limited to 'sound/soc/sunxi')
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diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
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index d7ee7a4..9a35313 100644
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--- a/sound/soc/sunxi/sun4i-i2s.c
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+++ b/sound/soc/sunxi/sun4i-i2s.c
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@@ -94,9 +94,13 @@
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* struct sun4i_i2s_quirks - Differences between SoC variants.
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*
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* @has_reset: SoC needs reset deasserted.
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+ * @mclk_offset: Value by which mclkdiv needs to be adjusted.
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+ * @bclk_offset: Value by which bclkdiv needs to be adjusted.
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*/
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struct sun4i_i2s_quirks {
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bool has_reset;
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+ unsigned int mclk_offset;
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+ unsigned int bclk_offset;
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};
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struct sun4i_i2s {
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@@ -237,6 +241,10 @@ static int sun4i_i2s_set_clk_rate(struct sun4i_i2s *i2s,
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if (mclk_div < 0)
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return -EINVAL;
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+ /* Adjust the clock division values if needed */
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+ bclk_div += i2s->variant->bclk_offset;
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+ mclk_div += i2s->variant->mclk_offset;
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+
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regmap_write(i2s->regmap, SUN4I_I2S_CLK_DIV_REG,
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SUN4I_I2S_CLK_DIV_BCLK(bclk_div) |
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SUN4I_I2S_CLK_DIV_MCLK(mclk_div) |
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--
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cgit v1.1
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