mirror of
https://github.com/Fishwaldo/build.git
synced 2025-03-25 00:01:35 +00:00
99 lines
3.6 KiB
Diff
99 lines
3.6 KiB
Diff
From d03d2737e2d20c6ffb242154a69e1a9313adb632 Mon Sep 17 00:00:00 2001
|
|
From: Marcus Cooper <codekipper@gmail.com>
|
|
Date: Sat, 19 Aug 2017 14:48:37 +0200
|
|
Subject: ASoC: sun4i-i2s: Check for slave select bit
|
|
|
|
The newer SoCs do not have this setting. Instead they set the pin
|
|
direction. Add a check to see if the bit is valid and if so set
|
|
it accordingly.
|
|
|
|
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
|
|
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
|
|
Signed-off-by: Mark Brown <broonie@kernel.org>
|
|
---
|
|
sound/soc/sunxi/sun4i-i2s.c | 37 +++++++++++++++++++++----------------
|
|
1 file changed, 21 insertions(+), 16 deletions(-)
|
|
|
|
(limited to 'sound/soc/sunxi')
|
|
|
|
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
|
|
index d9910f6..573acca 100644
|
|
--- a/sound/soc/sunxi/sun4i-i2s.c
|
|
+++ b/sound/soc/sunxi/sun4i-i2s.c
|
|
@@ -96,6 +96,7 @@
|
|
* struct sun4i_i2s_quirks - Differences between SoC variants.
|
|
*
|
|
* @has_reset: SoC needs reset deasserted.
|
|
+ * @has_slave_select_bit: SoC has a bit to enable slave mode.
|
|
* @reg_offset_txdata: offset of the tx fifo.
|
|
* @sun4i_i2s_regmap: regmap config to use.
|
|
* @mclk_offset: Value by which mclkdiv needs to be adjusted.
|
|
@@ -114,6 +115,7 @@
|
|
*/
|
|
struct sun4i_i2s_quirks {
|
|
bool has_reset;
|
|
+ bool has_slave_select_bit;
|
|
unsigned int reg_offset_txdata; /* TX FIFO */
|
|
const struct regmap_config *sun4i_i2s_regmap;
|
|
unsigned int mclk_offset;
|
|
@@ -394,24 +396,25 @@ static int sun4i_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
|
|
regmap_field_write(i2s->field_fmt_bclk, bclk_polarity);
|
|
regmap_field_write(i2s->field_fmt_lrclk, lrclk_polarity);
|
|
|
|
- /* DAI clock master masks */
|
|
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
|
- case SND_SOC_DAIFMT_CBS_CFS:
|
|
- /* BCLK and LRCLK master */
|
|
- val = SUN4I_I2S_CTRL_MODE_MASTER;
|
|
- break;
|
|
- case SND_SOC_DAIFMT_CBM_CFM:
|
|
- /* BCLK and LRCLK slave */
|
|
- val = SUN4I_I2S_CTRL_MODE_SLAVE;
|
|
- break;
|
|
- default:
|
|
- return -EINVAL;
|
|
+ if (i2s->variant->has_slave_select_bit) {
|
|
+ /* DAI clock master masks */
|
|
+ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
|
|
+ case SND_SOC_DAIFMT_CBS_CFS:
|
|
+ /* BCLK and LRCLK master */
|
|
+ val = SUN4I_I2S_CTRL_MODE_MASTER;
|
|
+ break;
|
|
+ case SND_SOC_DAIFMT_CBM_CFM:
|
|
+ /* BCLK and LRCLK slave */
|
|
+ val = SUN4I_I2S_CTRL_MODE_SLAVE;
|
|
+ break;
|
|
+ default:
|
|
+ return -EINVAL;
|
|
+ }
|
|
+ regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG,
|
|
+ SUN4I_I2S_CTRL_MODE_MASK,
|
|
+ val);
|
|
}
|
|
|
|
- regmap_update_bits(i2s->regmap, SUN4I_I2S_CTRL_REG,
|
|
- SUN4I_I2S_CTRL_MODE_MASK,
|
|
- val);
|
|
-
|
|
/* Set significant bits in our FIFOs */
|
|
regmap_update_bits(i2s->regmap, SUN4I_I2S_FIFO_CTRL_REG,
|
|
SUN4I_I2S_FIFO_CTRL_TX_MODE_MASK |
|
|
@@ -723,6 +726,7 @@ static const struct sun4i_i2s_quirks sun4i_a10_i2s_quirks = {
|
|
.field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
|
|
.field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6),
|
|
.field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
|
|
+ .has_slave_select_bit = true,
|
|
.field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
|
|
.field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
|
|
.field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
|
|
@@ -739,6 +743,7 @@ static const struct sun4i_i2s_quirks sun6i_a31_i2s_quirks = {
|
|
.field_fmt_sr = REG_FIELD(SUN4I_I2S_FMT0_REG, 4, 5),
|
|
.field_fmt_bclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 6, 6),
|
|
.field_fmt_lrclk = REG_FIELD(SUN4I_I2S_FMT0_REG, 7, 7),
|
|
+ .has_slave_select_bit = true,
|
|
.field_fmt_mode = REG_FIELD(SUN4I_I2S_FMT0_REG, 0, 1),
|
|
.field_txchanmap = REG_FIELD(SUN4I_I2S_TX_CHAN_MAP_REG, 0, 31),
|
|
.field_rxchanmap = REG_FIELD(SUN4I_I2S_RX_CHAN_MAP_REG, 0, 31),
|
|
--
|
|
cgit v1.1
|
|
|