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75 lines
1.9 KiB
Diff
75 lines
1.9 KiB
Diff
From dac5aed0eb680ea0c3de541a3bc06398b52ba5fa Mon Sep 17 00:00:00 2001
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From: Icenowy Zheng <icenowy@aosc.io>
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Date: Tue, 1 Aug 2017 21:13:03 +0800
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Subject: [PATCH] ARM: sun8i: h3: Add DesignWare HDMI controller node
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The H3 SoC has a DesignWare HDMI controller with some Allwinner-specific
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glue.
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Add the related device nodes.
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Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
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---
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arch/arm/boot/dts/sun8i-h3.dtsi | 41 +++++++++++++++++++++++++++++++++++++++++
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1 file changed, 41 insertions(+)
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diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
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index 75ad7b65a7fcd..e0fbab75aca10 100644
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--- a/arch/arm/boot/dts/sun8i-h3.dtsi
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+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
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@@ -97,6 +97,42 @@
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assigned-clock-rates = <432000000>;
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};
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+ hdmi: hdmi@1ee0000 {
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+ compatible = "allwinner,sun8i-h3-dw-hdmi";
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+ reg = <0x01ee0000 0x10000>,
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+ <0x01ef0000 0x10000>;
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+ reg-io-width = <1>;
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+ interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI>,
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+ <&ccu CLK_HDMI_DDC>;
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+ clock-names = "iahb", "isfr", "ddc";
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+ resets = <&ccu RST_BUS_HDMI0>, <&ccu RST_BUS_HDMI1>;
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+ reset-names = "hdmi", "ddc";
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+ status = "disabled";
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+
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ hdmi_in: port@0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <0>;
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+
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+ hdmi_in_tcon0: endpoint@0 {
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+ reg = <0>;
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+ remote-endpoint = <&tcon0_out_hdmi>;
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+ };
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+ };
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+
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+ hdmi_out: port@1 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ reg = <1>;
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+ };
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+ };
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+ };
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+
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mixer0: mixer@1100000 {
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compatible = "allwinner,sun8i-h3-de2-mixer0";
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reg = <0x01100000 0x100000>;
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@@ -197,6 +233,11 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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+
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+ tcon0_out_hdmi: endpoint@1 {
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+ reg = <1>;
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+ remote-endpoint = <&hdmi_in_tcon0>;
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+ };
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};
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};
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};
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