build/patch/kernel/sunxi-dev/ths-50-add-h5-opp-table-to-cpu.patch.disabled

55 lines
1.2 KiB
Text

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 422589b3..58821018 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -112,6 +112,12 @@
device_type = "cpu";
reg = <0>;
enable-method = "psci";
+
+ clocks = <&ccu CLK_CPUX>;
+ clock-names = "cpu";
+ clock-latency = <244144>; /* 8 32k periods */
+ operating-points-v2 = <&cpu_opp_table>;
+ #cooling-cells = <2>;
};
cpu@1 {
@@ -60,6 +65,7 @@
device_type = "cpu";
reg = <1>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
};
cpu@2 {
@@ -67,6 +73,7 @@
device_type = "cpu";
reg = <2>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
};
cpu@3 {
@@ -74,6 +81,7 @@
device_type = "cpu";
reg = <3>;
enable-method = "psci";
+ operating-points-v2 = <&cpu_opp_table>;
};
};
@@ -173,6 +181,13 @@
};
};
+ reg_cpu_fallback: reg_cpu_fallback {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-cpux-dummy";
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13