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93 lines
3.6 KiB
Diff
93 lines
3.6 KiB
Diff
From edbd075dec02474616bcd83540ac6e90a7822a1c Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
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Date: Thu, 8 Oct 2020 18:01:05 +0200
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Subject: [PATCH 04/10] cpufreq: armada-37xx: Fix the AVS value for loads L0
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and L1
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The original CPU voltage value for load L1 is too low for Armada-37xx SoC
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when base CPU frequency is 1000 or 1200 MHz. It leads to instabilities
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where CPU gets stuck soon after dynamic voltage scaling from load L1 to L0.
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Update the CPU voltage value for loads L0 and L1 accordingly when base
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frequency is 1000 or 1200 MHz. The minimal value is updated from the
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original 1.05V to 1.108V.
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This change fixes instability issues on 1 GHz variant of Espressobin and
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Turris MOX. It is based on previous work from Victor Gu <xigu@marvell.com>
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for Espressobin kernel 4.4 [1]. Discussion about this issue is also at
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armbian forum [2].
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[1] - https://github.com/MarvellEmbeddedProcessors/linux-marvell/commit/dc33b62c90696afb6adc7dbcc4ebbd48bedec269
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[2] - https://forum.armbian.com/topic/10429-how-to-make-espressobin-v7-stable/
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Signed-off-by: Pali Rohár <pali@kernel.org>
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Fixes: 1c3528232f4b ("cpufreq: armada-37xx: Add AVS support")
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Cc: stable@vger.kernel.org
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---
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drivers/cpufreq/armada-37xx-cpufreq.c | 26 ++++++++++++++++++++++++++
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1 file changed, 26 insertions(+)
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diff --git a/drivers/cpufreq/armada-37xx-cpufreq.c b/drivers/cpufreq/armada-37xx-cpufreq.c
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index b8dc6c849579..92e531f700f4 100644
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--- a/drivers/cpufreq/armada-37xx-cpufreq.c
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+++ b/drivers/cpufreq/armada-37xx-cpufreq.c
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@@ -73,6 +73,7 @@
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#define LOAD_LEVEL_NR 4
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#define MIN_VOLT_MV 1000
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+#define MIN_VOLT_MV_FOR_L0_L1_1GHZ 1108
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/* AVS value for the corresponding voltage (in mV) */
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static int avs_map[] = {
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@@ -208,6 +209,8 @@ static u32 armada_37xx_avs_val_match(int target_vm)
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* - L2 & L3 voltage should be about 150mv smaller than L0 voltage.
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* This function calculates L1 & L2 & L3 AVS values dynamically based
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* on L0 voltage and fill all AVS values to the AVS value table.
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+ * When base CPU frequency is 1000 or 1200 MHz then there is additional
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+ * minimal avs value for load L0 and L1.
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*/
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static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
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struct armada_37xx_dvfs *dvfs)
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@@ -239,6 +242,15 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
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for (load_level = 1; load_level < LOAD_LEVEL_NR; load_level++)
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dvfs->avs[load_level] = avs_min;
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+ /*
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+ * Set the avs value for load L0 and L1 when base CPU frequency is 1000/1200 MHz,
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+ * otherwise the CPU gets stuck when switching from load L1 to load L0
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+ */
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+ if (dvfs->cpu_freq_max >= 1000*1000*1000) {
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+ avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L0_L1_1GHZ);
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+ dvfs->avs[0] = dvfs->avs[1] = avs_min;
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+ }
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+
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return;
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}
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@@ -258,6 +270,20 @@ static void __init armada37xx_cpufreq_avs_configure(struct regmap *base,
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target_vm = avs_map[l0_vdd_min] - 150;
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target_vm = target_vm > MIN_VOLT_MV ? target_vm : MIN_VOLT_MV;
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dvfs->avs[2] = dvfs->avs[3] = armada_37xx_avs_val_match(target_vm);
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+
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+ /*
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+ * Fix the avs value for load L0 and L1 when base CPU frequency is 1000/1200 MHz,
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+ * otherwise the CPU gets stuck when switching from load L1 to load L0
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+ */
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+ if (dvfs->cpu_freq_max >= 1000*1000*1000) {
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+ u32 avs_min = armada_37xx_avs_val_match(MIN_VOLT_MV_FOR_L0_L1_1GHZ);
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+
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+ if (dvfs->avs[0] < avs_min)
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+ dvfs->avs[0] = avs_min;
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+
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+ if (dvfs->avs[1] < avs_min)
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+ dvfs->avs[1] = avs_min;
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+ }
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}
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static void __init armada37xx_cpufreq_avs_setup(struct regmap *base,
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--
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2.25.1
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