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34 lines
1.2 KiB
Diff
34 lines
1.2 KiB
Diff
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
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index 9a5464c62..91142959c 100644
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--- a/drivers/clocksource/arm_arch_timer.c
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+++ b/drivers/clocksource/arm_arch_timer.c
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@@ -341,17 +341,18 @@ static u64 notrace arm64_858921_read_cntvct_el0(void)
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* with all ones or all zeros in the low bits. Bound the loop by the maximum
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* number of CPU cycles in 3 consecutive 24 MHz counter periods.
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*/
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-#define __sun50i_a64_read_reg(reg) ({ \
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- u64 _val; \
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- int _retries = 150; \
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- \
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- do { \
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- _val = read_sysreg(reg); \
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- _retries--; \
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- } while (((_val + 1) & GENMASK(9, 0)) <= 1 && _retries); \
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- \
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- WARN_ON_ONCE(!_retries); \
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- _val; \
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+#define __sun50i_a64_read_reg(reg) ({ \
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+ u64 _old, _new; \
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+ int _retries = 200; \
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+ \
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+ do { \
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+ _old = read_sysreg(reg); \
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+ _new = read_sysreg(reg); \
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+ _retries--; \
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+ } while (unlikely(_old != _new) && _retries); \
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+ \
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+ WARN_ON_ONCE(!_retries); \
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+ _new; \
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})
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static u64 notrace sun50i_a64_read_cntpct_el0(void)
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