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61 lines
1.6 KiB
Diff
61 lines
1.6 KiB
Diff
From f267eff70c0c4f51765fcb2498444d7bc0048725 Mon Sep 17 00:00:00 2001
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From: Vasily Khoruzhick <anarsoul@gmail.com>
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Date: Tue, 7 Jan 2020 20:20:15 -0800
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Subject: arm64: dts: allwinner: a64: add CPU clock to CPU0-3 nodes
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Add CPU clock to the CPU nodes since it is a prerequisite for enabling
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DVFS.
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Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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[wens@csie.org: Replace CLK_CPUX macro with raw number]
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Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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---
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arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 ++++++++
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1 file changed, 8 insertions(+)
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(limited to 'arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi')
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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index 293059ffbbf6..72eedd39a2eb 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -51,6 +51,8 @@
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reg = <0>;
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enable-method = "psci";
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next-level-cache = <&L2>;
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+ clocks = <&ccu 21>;
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+ clock-names = "cpu";
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};
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cpu1: cpu@1 {
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@@ -59,6 +61,8 @@
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reg = <1>;
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enable-method = "psci";
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next-level-cache = <&L2>;
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+ clocks = <&ccu 21>;
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+ clock-names = "cpu";
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};
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cpu2: cpu@2 {
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@@ -67,6 +71,8 @@
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reg = <2>;
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enable-method = "psci";
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next-level-cache = <&L2>;
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+ clocks = <&ccu 21>;
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+ clock-names = "cpu";
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};
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cpu3: cpu@3 {
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@@ -75,6 +81,8 @@
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reg = <3>;
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enable-method = "psci";
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next-level-cache = <&L2>;
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+ clocks = <&ccu 21>;
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+ clock-names = "cpu";
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};
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L2: l2-cache {
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--
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cgit 1.2-0.3.lf.el7
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