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165 lines
4.1 KiB
Diff
165 lines
4.1 KiB
Diff
From 24b38ca3bd2579d4bac18f57526c93bc63354959 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Fri, 20 Jul 2018 15:29:18 +0200
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Subject: [PATCH] drm/meson: Add HDMI 1.4 4k modes
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Add the timings for the HDMI 1.4 4K modes support :
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- 3840x2160@30
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- 3840x2160@25
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- 3840x2160@24
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Since the 297000Hz pixel clock is already managed and the modes are
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compatible with the HDMI 1.4 current HDMI PHY+Controller support, only
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the missing timings values needs to be added.
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---
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drivers/gpu/drm/meson/meson_venc.c | 129 +++++++++++++++++++++++++++++++++++++
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1 file changed, 129 insertions(+)
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diff --git a/drivers/gpu/drm/meson/meson_venc.c b/drivers/gpu/drm/meson/meson_venc.c
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index 14aac66..d68ccbf 100644
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--- a/drivers/gpu/drm/meson/meson_venc.c
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+++ b/drivers/gpu/drm/meson/meson_venc.c
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@@ -698,6 +698,132 @@ union meson_hdmi_venc_mode meson_hdmi_encp_mode_1080p60 = {
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},
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};
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+union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p24 = {
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+ .encp = {
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+ .dvi_settings = 0x1,
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+ .video_mode = 0x4040,
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+ .video_mode_adv = 0x8,
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+ /* video_sync_mode */
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+ /* video_yc_dly */
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+ /* video_rgb_ctrl */
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+ .video_filt_ctrl = 0x1000,
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+ .video_filt_ctrl_present = true,
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+ /* video_ofld_voav_ofst */
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+ .yfp1_htime = 140,
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+ .yfp2_htime = 140+3840,
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+ .max_pxcnt = 3840+1660-1,
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+ .hspuls_begin = 2156+1920,
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+ .hspuls_end = 44,
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+ .hspuls_switch = 44,
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+ .vspuls_begin = 140,
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+ .vspuls_end = 2059+1920,
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+ .vspuls_bline = 0,
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+ .vspuls_eline = 4,
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+ .havon_begin = 148,
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+ .havon_end = 3987,
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+ .vavon_bline = 89,
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+ .vavon_eline = 2248,
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+ /* eqpuls_begin */
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+ /* eqpuls_end */
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+ /* eqpuls_bline */
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+ /* eqpuls_eline */
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+ .hso_begin = 44,
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+ .hso_end = 2156+1920,
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+ .vso_begin = 2100+1920,
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+ .vso_end = 2164+1920,
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+ .vso_bline = 51,
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+ .vso_eline = 53,
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+ .vso_eline_present = true,
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+ /* sy_val */
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+ /* sy2_val */
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+ .max_lncnt = 2249,
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+ },
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+};
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+
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+union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p25 = {
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+ .encp = {
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+ .dvi_settings = 0x1,
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+ .video_mode = 0x4040,
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+ .video_mode_adv = 0x8,
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+ /* video_sync_mode */
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+ /* video_yc_dly */
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+ /* video_rgb_ctrl */
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+ .video_filt_ctrl = 0x1000,
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+ .video_filt_ctrl_present = true,
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+ /* video_ofld_voav_ofst */
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+ .yfp1_htime = 140,
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+ .yfp2_htime = 140+3840,
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+ .max_pxcnt = 3840+1440-1,
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+ .hspuls_begin = 2156+1920,
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+ .hspuls_end = 44,
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+ .hspuls_switch = 44,
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+ .vspuls_begin = 140,
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+ .vspuls_end = 2059+1920,
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+ .vspuls_bline = 0,
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+ .vspuls_eline = 4,
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+ .havon_begin = 148,
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+ .havon_end = 3987,
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+ .vavon_bline = 89,
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+ .vavon_eline = 2248,
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+ /* eqpuls_begin */
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+ /* eqpuls_end */
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+ /* eqpuls_bline */
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+ /* eqpuls_eline */
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+ .hso_begin = 44,
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+ .hso_end = 2156+1920,
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+ .vso_begin = 2100+1920,
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+ .vso_end = 2164+1920,
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+ .vso_bline = 51,
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+ .vso_eline = 53,
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+ .vso_eline_present = true,
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+ /* sy_val */
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+ /* sy2_val */
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+ .max_lncnt = 2249,
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+ },
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+};
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+
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+union meson_hdmi_venc_mode meson_hdmi_encp_mode_2160p30 = {
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+ .encp = {
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+ .dvi_settings = 0x1,
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+ .video_mode = 0x4040,
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+ .video_mode_adv = 0x8,
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+ /* video_sync_mode */
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+ /* video_yc_dly */
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+ /* video_rgb_ctrl */
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+ .video_filt_ctrl = 0x1000,
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+ .video_filt_ctrl_present = true,
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+ /* video_ofld_voav_ofst */
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+ .yfp1_htime = 140,
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+ .yfp2_htime = 140+3840,
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+ .max_pxcnt = 3840+560-1,
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+ .hspuls_begin = 2156+1920,
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+ .hspuls_end = 44,
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+ .hspuls_switch = 44,
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+ .vspuls_begin = 140,
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+ .vspuls_end = 2059+1920,
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+ .vspuls_bline = 0,
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+ .vspuls_eline = 4,
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+ .havon_begin = 148,
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+ .havon_end = 3987,
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+ .vavon_bline = 89,
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+ .vavon_eline = 2248,
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+ /* eqpuls_begin */
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+ /* eqpuls_end */
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+ /* eqpuls_bline */
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+ /* eqpuls_eline */
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+ .hso_begin = 44,
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+ .hso_end = 2156+1920,
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+ .vso_begin = 2100+1920,
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+ .vso_end = 2164+1920,
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+ .vso_bline = 51,
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+ .vso_eline = 53,
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+ .vso_eline_present = true,
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+ /* sy_val */
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+ /* sy2_val */
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+ .max_lncnt = 2249,
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+ },
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+};
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+
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struct meson_hdmi_venc_vic_mode {
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unsigned int vic;
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union meson_hdmi_venc_mode *mode;
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@@ -718,6 +844,9 @@ struct meson_hdmi_venc_vic_mode {
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{ 34, &meson_hdmi_encp_mode_1080p30 },
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{ 31, &meson_hdmi_encp_mode_1080p50 },
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{ 16, &meson_hdmi_encp_mode_1080p60 },
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+ { 93, &meson_hdmi_encp_mode_2160p24 },
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+ { 94, &meson_hdmi_encp_mode_2160p25 },
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+ { 95, &meson_hdmi_encp_mode_2160p30 },
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{ 0, NULL}, /* sentinel */
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};
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