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a57ce78b37
* Bump to 4.18, removing the obvious, fixing build problems, put some on waiting. * Pin 4.18 to DEV, rollback 4.14 to NEXT, adjust configs, remove one deprecated patch from NEXT and add board-h3-address-some-stability-issues.patch * Adjust few boards in development to new reality, removing it from NEXT for now * Adjust few board configs * Board config adjustement * Adjust few boards configs * Port NeoCore2 and Neo21.1 to 4.14.y * Adjust board config * Adjust board config
84 lines
3.3 KiB
Diff
84 lines
3.3 KiB
Diff
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
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index 3346c1e2a7a0..fe31b1510717 100644
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--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
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+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
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@@ -187,6 +187,62 @@ And on the A23, A31, A31s and A33, you need one more clock line:
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- 'lvds-alt': An alternative clock source, separate from the TCON channel 0
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clock, that can be used to drive the LVDS clock
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+TCON TOP
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+--------
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+
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+TCON TOPs main purpose is to configure whole display pipeline. It determines
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+relationships between mixers and TCONs, selects source TCON for HDMI, muxes
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+LCD and TV encoder GPIO output, selects TV encoder clock source and contains
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+additional TV TCON and DSI gates.
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+
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+It allows display pipeline to be configured in very different ways:
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+
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+ / LCD0/LVDS0
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+ / [0] TCON-LCD0
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+ | \ MIPI DSI
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+ mixer0 |
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+ \ / [1] TCON-LCD1 - LCD1/LVDS1
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+ TCON-TOP
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+ / \ [2] TCON-TV0 [0] - TVE0/RGB
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+ mixer1 | \
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+ | TCON-TOP - HDMI
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+ | /
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+ \ [3] TCON-TV1 [1] - TVE1/RGB
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+
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+Note that both TCON TOP references same physical unit. Both mixers can be
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+connected to any TCON.
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+
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+Required properties:
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+ - compatible: value must be one of:
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+ * allwinner,sun8i-r40-tcon-top
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+ - reg: base address and size of the memory-mapped region.
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+ - clocks: phandle to the clocks feeding the TCON TOP
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+ * bus: TCON TOP interface clock
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+ * tcon-tv0: TCON TV0 clock
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+ * tve0: TVE0 clock
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+ * tcon-tv1: TCON TV1 clock
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+ * tve1: TVE0 clock
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+ * dsi: MIPI DSI clock
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+ - clock-names: clock name mentioned above
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+ - resets: phandle to the reset line driving the TCON TOP
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+ - #clock-cells : must contain 1
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+ - clock-output-names: Names of clocks created for TCON TV0 channel clock,
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+ TCON TV1 channel clock and DSI channel clock, in that order.
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+
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+- ports: A ports node with endpoint definitions as defined in
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+ Documentation/devicetree/bindings/media/video-interfaces.txt. 6 ports should
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+ be defined:
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+ * port 0 is input for mixer0 mux
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+ * port 1 is output for mixer0 mux
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+ * port 2 is input for mixer1 mux
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+ * port 3 is output for mixer1 mux
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+ * port 4 is input for HDMI mux
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+ * port 5 is output for HDMI mux
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+ All output endpoints for mixer muxes and input endpoints for HDMI mux should
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+ have reg property with the id of the target TCON, as shown in above graph
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+ (0-3 for mixer muxes and 0-1 for HDMI mux). All ports should have only one
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+ endpoint connected to remote endpoint.
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+
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DRC
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---
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diff --git a/include/dt-bindings/clock/sun8i-tcon-top.h b/include/dt-bindings/clock/sun8i-tcon-top.h
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new file mode 100644
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index 000000000000..25164d767835
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--- /dev/null
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+++ b/include/dt-bindings/clock/sun8i-tcon-top.h
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@@ -0,0 +1,11 @@
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+/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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+/* Copyright (C) 2018 Jernej Skrabec <jernej.skrabec@siol.net> */
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+
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+#ifndef _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_
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+#define _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_
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+
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+#define CLK_TCON_TOP_TV0 0
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+#define CLK_TCON_TOP_TV1 1
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+#define CLK_TCON_TOP_DSI 2
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+
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+#endif /* _DT_BINDINGS_CLOCK_SUN8I_TCON_TOP_H_ */
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