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f49c6f8e2b
1: update meson 4K support patches: 2, HDMI i2s improvement patches: 3, update vdec patches: 4, update meson audio patches: 5, add meson crypto engine driver 6, remove disabled patches: 7 remove unknown patch or no need 8, remove merged patches: 9, remove unknown patches from khadas should be covered by patches set 2 10, rename patches for better grouping 11, update kernel config accordingly Signed-off-by: Zhang Ning <832666+zhangn1985@users.noreply.github.com>
155 lines
4.1 KiB
Diff
155 lines
4.1 KiB
Diff
From b0afd0cd4e272d10974ba819268400fdd53ae988 Mon Sep 17 00:00:00 2001
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From: Jerome Brunet <jbrunet@baylibre.com>
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Date: Thu, 30 Mar 2017 15:19:04 +0200
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Subject: [PATCH 06/16] ARM64: dts: meson-gx: add audio controller nodes
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Add audio controller nodes for Amlogic meson gxbb and gxl.
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This includes the audio-core node, the i2s and spdif DAIs
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Audio on this SoC family is still a work in progress. More nodes are likely
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to be added later on (pcm DAIs, input DMAs, etc ...)
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Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
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---
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arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 23 +++++++++++++++++
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arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 28 +++++++++++++++++++++
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arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 28 +++++++++++++++++++++
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3 files changed, 79 insertions(+)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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index 86e26ed551e0..f2caa324d5aa 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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@@ -225,6 +225,29 @@
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#reset-cells = <1>;
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};
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+ audio: audio@5400 {
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+ compatible = "amlogic,meson-gx-audio-core";
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+ reg = <0x0 0x5400 0x0 0x2ac>,
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+ <0x0 0xa000 0x0 0x304>;
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+ reg-names = "aiu", "audin";
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+ status = "disabled";
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+
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+ aiu_i2s: audio-controller-0 {
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+ #sound-dai-cells = <0>;
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+ compatible = "amlogic,meson-aiu-i2s";
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+ interrupts = <GIC_SPI 48 IRQ_TYPE_EDGE_RISING>;
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+ status = "disabled";
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+ };
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+
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+ aiu_spdif: audio-controller-1 {
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+ #sound-dai-cells = <0>;
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+ compatible = "amlogic,meson-aiu-spdif";
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+ interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
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+ status = "disabled";
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+ };
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+
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+ };
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+
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uart_A: serial@84c0 {
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compatible = "amlogic,meson-gx-uart";
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reg = <0x0 0x84c0 0x0 0x18>;
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
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index 0cb40326b0d3..89391f26e2ca 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
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@@ -724,6 +724,24 @@
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};
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};
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+&audio {
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+ clocks = <&clkc CLKID_AIU>,
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+ <&clkc CLKID_AIU_GLUE>,
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+ <&clkc CLKID_I2S_SPDIF>;
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+ clock-names = "aiu_top", "aiu_glue", "audin";
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+ resets = <&reset RESET_AIU>,
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+ <&reset RESET_AUDIN>;
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+ reset-names = "aiu", "audin";
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+};
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+
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+&aiu_i2s {
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+ clocks = <&clkc CLKID_I2S_OUT>,
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+ <&clkc CLKID_MIXER_IFACE>,
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+ <&clkc CLKID_AOCLK_GATE>,
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+ <&clkc CLKID_CTS_AMCLK>;
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+ clock-names = "fast", "iface", "bclks", "mclk";
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+};
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+
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&pwrc_vpu {
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resets = <&reset RESET_VIU>,
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<&reset RESET_VENC>,
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@@ -812,6 +830,15 @@
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num-cs = <1>;
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};
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+&aiu_spdif {
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+ clocks = <&clkc CLKID_IEC958>,
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+ <&clkc CLKID_IEC958_GATE>,
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+ <&clkc CLKID_CTS_MCLK_I958>,
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+ <&clkc CLKID_CTS_AMCLK>,
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+ <&clkc CLKID_CTS_I958>;
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+ clock-names = "fast", "iface", "mclk_i958", "mclk_i2s", "mclk";
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+};
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+
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&spifc {
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clocks = <&clkc CLKID_SPI>;
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};
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@@ -856,3 +883,4 @@
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resets = <&reset RESET_PARSER>;
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reset-names = "esparser";
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};
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+
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
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index a09c53aaa0e8..28b1afc24514 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
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@@ -727,6 +727,24 @@
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};
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};
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+&audio {
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+ clocks = <&clkc CLKID_AIU>,
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+ <&clkc CLKID_AIU_GLUE>,
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+ <&clkc CLKID_I2S_SPDIF>;
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+ clock-names = "aiu_top", "aiu_glue", "audin";
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+ resets = <&reset RESET_AIU>,
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+ <&reset RESET_AUDIN>;
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+ reset-names = "aiu", "audin";
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+};
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+
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+&aiu_i2s {
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+ clocks = <&clkc CLKID_I2S_OUT>,
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+ <&clkc CLKID_MIXER_IFACE>,
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+ <&clkc CLKID_AOCLK_GATE>,
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+ <&clkc CLKID_CTS_AMCLK>;
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+ clock-names = "fast", "iface", "bclks", "mclk";
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+};
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+
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&pwrc_vpu {
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resets = <&reset RESET_VIU>,
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<&reset RESET_VENC>,
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@@ -815,6 +833,15 @@
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num-cs = <1>;
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};
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+&aiu_spdif {
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+ clocks = <&clkc CLKID_IEC958>,
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+ <&clkc CLKID_IEC958_GATE>,
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+ <&clkc CLKID_CTS_MCLK_I958>,
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+ <&clkc CLKID_CTS_AMCLK>,
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+ <&clkc CLKID_CTS_I958>;
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+ clock-names = "fast", "iface", "mclk_i958", "mclk_i2s", "mclk";
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+};
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+
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&spifc {
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clocks = <&clkc CLKID_SPI>;
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};
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@@ -859,3 +886,4 @@
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resets = <&reset RESET_PARSER>;
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reset-names = "esparser";
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};
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+
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--
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2.20.1
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