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62 lines
1.7 KiB
Diff
62 lines
1.7 KiB
Diff
From ff4436bd3de240a1d0796d4c6f8bd676ff0925e1 Mon Sep 17 00:00:00 2001
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From: Vasily Khoruzhick <anarsoul@gmail.com>
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Date: Mon, 23 Apr 2018 23:24:41 -0700
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Subject: [PATCH 034/146] dts: a64 ths
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---
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arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 32 +++++++++++++++++++
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1 file changed, 32 insertions(+)
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diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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index 0b44018361cb..0eb482eb58b7 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -171,6 +171,27 @@
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};
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};
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+ thermal-zones {
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+ cpu_thermal: cpu0-thermal {
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+ /* milliseconds */
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&ths 0>;
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+ };
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+ gpu0_thermal: gpu0-thermal {
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+ /* milliseconds */
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&ths 1>;
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+ };
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+ gpu1_thermal: gpu1-thermal {
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+ /* milliseconds */
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&ths 2>;
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+ };
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+ };
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+
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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@@ -536,6 +557,17 @@
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status = "disabled";
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};
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+ ths: thermal-sensor@1c25000 {
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+ compatible = "allwinner,sun50i-a64-ths";
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+ reg = <0x01c25000 0x100>;
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+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
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+ clock-names = "bus", "mod";
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+ resets = <&ccu RST_BUS_THS>;
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+ #io-channel-cells = <0>;
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+ #thermal-sensor-cells = <1>;
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+ };
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+
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uart0: serial@1c28000 {
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compatible = "snps,dw-apb-uart";
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reg = <0x01c28000 0x400>;
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--
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2.17.1
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