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aba730f488
It uses the same kernel as next, but it uses mainline u-boot with DT overlay support, but without SPI, USB and possibly SATA support
67 lines
2 KiB
Diff
67 lines
2 KiB
Diff
From ae07b208fe4e228068282ad76cfd69ab9e96dc9f Mon Sep 17 00:00:00 2001
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From: Russell King <rmk+kernel@arm.linux.org.uk>
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Date: Mon, 28 Dec 2015 13:55:13 +0100
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Subject: [PATCH] implement slot capabilities (SSPL)
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---
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drivers/pci/host/pci-mvebu.c | 22 ++++++++++++++++++++--
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1 file changed, 20 insertions(+), 2 deletions(-)
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diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
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index 7980be0..0e9b820 100644
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--- a/drivers/pci/host/pci-mvebu.c
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+++ b/drivers/pci/host/pci-mvebu.c
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@@ -65,6 +65,12 @@
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#define PCIE_STAT_BUS 0xff00
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#define PCIE_STAT_DEV 0x1f0000
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#define PCIE_STAT_LINK_DOWN BIT(0)
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+#define PCIE_SSPL 0x1a0c
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+#define PCIE_SSPL_MSGEN BIT(14)
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+#define PCIE_SSPL_SPLS(x) (((x) & 3) << 8)
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+#define PCIE_SSPL_SPLS_VAL(x) (((x) >> 8) & 3)
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+#define PCIE_SSPL_SPLV(x) ((x) & 0xff)
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+#define PCIE_SSPL_SPLV_VAL(x) ((x) & 0xff)
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#define PCIE_RC_RTSTA 0x1a14
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#define PCIE_DEBUG_CTRL 0x1a60
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#define PCIE_DEBUG_SOFT_RESET BIT(20)
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@@ -119,7 +125,6 @@ struct mvebu_sw_pci_bridge {
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u16 bridgectrl;
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/* PCI express capability */
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- u32 pcie_sltcap;
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u16 pcie_devctl;
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u16 pcie_rtctl;
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};
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@@ -640,8 +645,12 @@ static int mvebu_sw_pci_bridge_read(struct mvebu_pcie_port *port,
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break;
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case PCISWCAP_EXP_SLTCAP:
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- *value = bridge->pcie_sltcap;
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+ {
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+ u32 tmp = mvebu_readl(port, PCIE_SSPL);
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+ *value = PCIE_SSPL_SPLS_VAL(tmp) << 15 |
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+ PCIE_SSPL_SPLV_VAL(tmp) << 7;
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break;
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+ }
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case PCISWCAP_EXP_SLTCTL:
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*value = PCI_EXP_SLTSTA_PDS << 16;
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@@ -824,6 +833,15 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port,
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mvebu_writel(port, value, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
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break;
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+ case PCISWCAP_EXP_SLTCAP:
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+ {
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+ u32 sspl = PCIE_SSPL_SPLV((value & PCI_EXP_SLTCAP_SPLV) >> 7) |
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+ PCIE_SSPL_SPLS((value & PCI_EXP_SLTCAP_SPLS) >> 15) |
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+ PCIE_SSPL_MSGEN;
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+ mvebu_writel(port, sspl, PCIE_SSPL);
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+ break;
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+ }
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+
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case PCISWCAP_EXP_RTCTL:
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old = bridge->pcie_rtctl;
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bridge->pcie_rtctl = value & (PCI_EXP_RTCTL_SECEE |
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--
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1.9.1
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