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150ac0c2af
AR-1 - Adding support category for distributions AR-4 - Remove Allwinner legacy AR-5 - Drop Udoo family and move Udoo board into newly created imx6 family AR-9 - Rename sunxi-next to sunxi-legacy AR-10 - Rename sunxi-dev to sunxi-current AR-11 - Adding Radxa Rockpi S support AR-13 - Rename rockchip64-default to rockchip64-legacy AR-14 - Add rockchip64-current as mainline source AR-15 - Drop Rockchip 4.19.y NEXT, current become 5.3.y AR-16 - Rename RK3399 default to legacy AR-17 - Rename Odroid XU4 next and default to legacy 4.14.y, add DEV 5.4.y AR-18 - Add Odroid N2 current mainline AR-19 - Move Odroid C1 to meson family AR-20 - Rename mvebu64-default to mvebu64-legacy AR-21 - Rename mvebu-default to mvebu-legacy AR-22 - Rename mvebu-next to mvebu-current AR-23 - Drop meson64 default and next, current becomes former DEV 5.3.y AR-24 - Drop cubox family and move Cubox/Hummingboard boards under imx6 AR-26 - Adjust motd AR-27 - Enabling distribution release status AR-28 - Added new GCC compilers AR-29 - Implementing Ubuntu Eoan AR-30 - Add desktop packages per board or family AR-31 - Remove (Ubuntu/Debian) distribution name from image filename AR-32 - Move arch configs from configuration.sh to separate arm64 and armhf config files AR-33 - Revision numbers for beta builds changed to day_in_the_year AR-34 - Patches support linked patches AR-35 - Break meson64 family into gxbb and gxl AR-36 - Add Nanopineo2 Black AR-38 - Upgrade option from old branches to new one via armbian-config AR-41 - Show full timezone info AR-43 - Merge Odroid N2 to meson64 AR-44 - Enable FORCE_BOOTSCRIPT_UPDATE for all builds
55 lines
1.2 KiB
Text
55 lines
1.2 KiB
Text
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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index 422589b3..58821018 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
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@@ -112,6 +112,12 @@
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device_type = "cpu";
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reg = <0>;
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enable-method = "psci";
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+
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+ clocks = <&ccu CLK_CPUX>;
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+ clock-names = "cpu";
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+ clock-latency = <244144>; /* 8 32k periods */
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+ operating-points-v2 = <&cpu_opp_table>;
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+ #cooling-cells = <2>;
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};
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cpu@1 {
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@@ -60,6 +65,7 @@
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device_type = "cpu";
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reg = <1>;
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enable-method = "psci";
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+ operating-points-v2 = <&cpu_opp_table>;
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};
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cpu@2 {
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@@ -67,6 +73,7 @@
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device_type = "cpu";
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reg = <2>;
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enable-method = "psci";
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+ operating-points-v2 = <&cpu_opp_table>;
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};
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cpu@3 {
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@@ -74,6 +81,7 @@
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device_type = "cpu";
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reg = <3>;
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enable-method = "psci";
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+ operating-points-v2 = <&cpu_opp_table>;
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};
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};
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@@ -173,6 +181,13 @@
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};
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};
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+ reg_cpu_fallback: reg_cpu_fallback {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vdd-cpux-dummy";
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+ regulator-min-microvolt = <1100000>;
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+ regulator-max-microvolt = <1100000>;
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+ };
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+
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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