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23604e8a0d
* Introducing Rockchip rk322x SoC support Main features: - Legacy kernel flavour based upon stable v2.x rk3288 Rockchip branch (https://github.com/rockchip-linux/kernel/tree/stable-4.4-rk3288-linux-v2.x) - Current kernel flavour based on mainline 5.6.y kernel - Mainline u-boot (v2020.04) - Single generic tv box target (rk322x-box) which boots on all the known tv boxes - Hardware devices (eMMC/NAND, led wiring configuration, SoC variant selection) modulation done by user at runtime via device tree overlays - a script (rk322x-config) is provided for autodetection and simple configuration by inexperienced users; - Bits added to armbian-hardware-optimization to set affinity for irq handlers - rk322x-box targets already added to targets.conf for automatic image creation * Removed disabled patches * Restored mysteriously removed comment character
62 lines
1.6 KiB
Text
62 lines
1.6 KiB
Text
diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi
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index af417ae37..a4108dde0 100644
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--- a/arch/arm/boot/dts/rk322x.dtsi
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+++ b/arch/arm/boot/dts/rk322x.dtsi
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@@ -774,23 +775,9 @@
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status = "disabled";
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};
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- gpu: gpu@0x20001000 {
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- compatible = "arm,mali400";
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- reg = <0x20001000 0x200>,
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- <0x20000000 0x100>,
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- <0x20003000 0x100>,
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- <0x20008000 0x1100>,
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- <0x20004000 0x100>,
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- <0x2000A000 0x1100>,
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- <0x20005000 0x100>;
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-
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- reg-names = "Mali_L2",
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- "Mali_GP",
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- "Mali_GP_MMU",
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- "Mali_PP0",
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- "Mali_PP0_MMU",
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- "Mali_PP1",
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- "Mali_PP1_MMU";
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+ gpu: gpu@20000000 {
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+ compatible = "arm,mali-400";
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+ reg = <0x20000000 0x10000>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
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@@ -799,16 +786,21 @@
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<GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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- interrupt-names = "Mali_GP_IRQ",
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- "Mali_GP_MMU_IRQ",
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- "Mali_PP0_IRQ",
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- "Mali_PP0_MMU_IRQ",
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- "Mali_PP1_IRQ",
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- "Mali_PP1_MMU_IRQ";
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- clocks = <&cru ACLK_GPU>;
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- #cooling-cells = <2>; /* min followed by max */
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- clock-names = "clk_mali";
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+ interrupt-names = "IRQGP",
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+ "IRQGPMMU",
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+ "IRQPP0",
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+ "IRQPPMMU0",
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+ "IRQPP1",
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+ "IRQPPMMU1";
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+
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+ clocks = <&cru ACLK_GPU>, <&cru ACLK_GPU>, <&cru ACLK_GPU>;
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+ clock-names = "clk_mali", "core", "bus";
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+
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+ resets = <&cru SRST_GPU_A>;
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+
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operating-points-v2 = <&gpu_opp_table>;
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+
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+ #cooling-cells = <2>; /* min followed by max */
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status = "disabled";
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gpu_power_model: power_model {
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