build/patch/kernel/sunxi-dev/revert-rtl8211e-rx-tx-delay-config-change.patch
5kft 950267eadb
[ sunxi-dev ] added revert of RTL8211E driver rx/tx delay config change
A new kernel change (see https://lkml.org/lkml/2020/9/16/1323) introduces
significant instabilities in the RTL8211E Ethernet interface; this patch
reverts that change so that the RTL8211E works reliably again.
2020-10-15 18:56:11 -07:00

74 lines
2.6 KiB
Diff

diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
index 0f0960971..c7229d022 100644
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
-/* drivers/net/phy/realtek.c
+/*
+ * drivers/net/phy/realtek.c
*
* Driver for Realtek PHYs
*
@@ -31,9 +32,9 @@
#define RTL8211F_TX_DELAY BIT(8)
#define RTL8211F_RX_DELAY BIT(3)
-#define RTL8211E_CTRL_DELAY BIT(13)
-#define RTL8211E_TX_DELAY BIT(12)
-#define RTL8211E_RX_DELAY BIT(11)
+#define RTL8211E_TX_DELAY BIT(1)
+#define RTL8211E_RX_DELAY BIT(2)
+#define RTL8211E_MODE_MII_GMII BIT(3)
#define RTL8201F_ISR 0x1e
#define RTL8201F_IER 0x13
@@ -245,16 +246,16 @@ static int rtl8211e_config_init(struct phy_device *phydev)
/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
switch (phydev->interface) {
case PHY_INTERFACE_MODE_RGMII:
- val = RTL8211E_CTRL_DELAY | 0;
+ val = 0;
break;
case PHY_INTERFACE_MODE_RGMII_ID:
- val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
+ val = RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
break;
case PHY_INTERFACE_MODE_RGMII_RXID:
- val = RTL8211E_CTRL_DELAY | RTL8211E_RX_DELAY;
+ val = RTL8211E_RX_DELAY;
break;
case PHY_INTERFACE_MODE_RGMII_TXID:
- val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY;
+ val = RTL8211E_TX_DELAY;
break;
default: /* the rest of the modes imply leaving delays as is. */
return 0;
@@ -262,12 +263,11 @@ static int rtl8211e_config_init(struct phy_device *phydev)
/* According to a sample driver there is a 0x1c config register on the
* 0xa4 extension page (0x7) layout. It can be used to disable/enable
- * the RX/TX delays otherwise controlled by RXDLY/TXDLY pins.
- * The configuration register definition:
- * 14 = reserved
- * 13 = Force Tx RX Delay controlled by bit12 bit11,
- * 12 = RX Delay, 11 = TX Delay
- * 10:0 = Test && debug settings reserved by realtek
+ * the RX/TX delays otherwise controlled by RXDLY/TXDLY pins. It can
+ * also be used to customize the whole configuration register:
+ * 8:6 = PHY Address, 5:4 = Auto-Negotiation, 3 = Interface Mode Select,
+ * 2 = RX Delay, 1 = TX Delay, 0 = SELRGV (see original PHY datasheet
+ * for details).
*/
oldpage = phy_select_page(phydev, 0x7);
if (oldpage < 0)
@@ -277,8 +277,7 @@ static int rtl8211e_config_init(struct phy_device *phydev)
if (ret)
goto err_restore_page;
- ret = __phy_modify(phydev, 0x1c, RTL8211E_CTRL_DELAY
- | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
+ ret = __phy_modify(phydev, 0x1c, RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
val);
err_restore_page: