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A new kernel change (see https://lkml.org/lkml/2020/9/16/1323) introduces significant instabilities in the RTL8211E Ethernet interface; this patch reverts that change so that the RTL8211E works reliably again.
74 lines
2.6 KiB
Diff
74 lines
2.6 KiB
Diff
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c
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index 0f0960971..c7229d022 100644
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--- a/drivers/net/phy/realtek.c
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+++ b/drivers/net/phy/realtek.c
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@@ -1,5 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0+
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-/* drivers/net/phy/realtek.c
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+/*
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+ * drivers/net/phy/realtek.c
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*
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* Driver for Realtek PHYs
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*
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@@ -31,9 +32,9 @@
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#define RTL8211F_TX_DELAY BIT(8)
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#define RTL8211F_RX_DELAY BIT(3)
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-#define RTL8211E_CTRL_DELAY BIT(13)
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-#define RTL8211E_TX_DELAY BIT(12)
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-#define RTL8211E_RX_DELAY BIT(11)
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+#define RTL8211E_TX_DELAY BIT(1)
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+#define RTL8211E_RX_DELAY BIT(2)
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+#define RTL8211E_MODE_MII_GMII BIT(3)
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#define RTL8201F_ISR 0x1e
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#define RTL8201F_IER 0x13
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@@ -245,16 +246,16 @@ static int rtl8211e_config_init(struct phy_device *phydev)
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/* enable TX/RX delay for rgmii-* modes, and disable them for rgmii. */
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switch (phydev->interface) {
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case PHY_INTERFACE_MODE_RGMII:
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- val = RTL8211E_CTRL_DELAY | 0;
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+ val = 0;
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break;
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case PHY_INTERFACE_MODE_RGMII_ID:
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- val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
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+ val = RTL8211E_TX_DELAY | RTL8211E_RX_DELAY;
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break;
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case PHY_INTERFACE_MODE_RGMII_RXID:
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- val = RTL8211E_CTRL_DELAY | RTL8211E_RX_DELAY;
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+ val = RTL8211E_RX_DELAY;
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break;
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case PHY_INTERFACE_MODE_RGMII_TXID:
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- val = RTL8211E_CTRL_DELAY | RTL8211E_TX_DELAY;
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+ val = RTL8211E_TX_DELAY;
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break;
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default: /* the rest of the modes imply leaving delays as is. */
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return 0;
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@@ -262,12 +263,11 @@ static int rtl8211e_config_init(struct phy_device *phydev)
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/* According to a sample driver there is a 0x1c config register on the
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* 0xa4 extension page (0x7) layout. It can be used to disable/enable
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- * the RX/TX delays otherwise controlled by RXDLY/TXDLY pins.
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- * The configuration register definition:
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- * 14 = reserved
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- * 13 = Force Tx RX Delay controlled by bit12 bit11,
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- * 12 = RX Delay, 11 = TX Delay
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- * 10:0 = Test && debug settings reserved by realtek
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+ * the RX/TX delays otherwise controlled by RXDLY/TXDLY pins. It can
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+ * also be used to customize the whole configuration register:
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+ * 8:6 = PHY Address, 5:4 = Auto-Negotiation, 3 = Interface Mode Select,
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+ * 2 = RX Delay, 1 = TX Delay, 0 = SELRGV (see original PHY datasheet
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+ * for details).
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*/
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oldpage = phy_select_page(phydev, 0x7);
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if (oldpage < 0)
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@@ -277,8 +277,7 @@ static int rtl8211e_config_init(struct phy_device *phydev)
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if (ret)
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goto err_restore_page;
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- ret = __phy_modify(phydev, 0x1c, RTL8211E_CTRL_DELAY
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- | RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
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+ ret = __phy_modify(phydev, 0x1c, RTL8211E_TX_DELAY | RTL8211E_RX_DELAY,
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val);
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err_restore_page:
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