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* Attach Meson64 to mainline with a bunch of patches. Tested, but need further work. * Enable DVFS on N2 which sometimes works, sometime doesn't, cleanup * Enable beta targets for Meson64 kernel family * Bump with version
59 lines
2.4 KiB
Diff
59 lines
2.4 KiB
Diff
From 75d7dffe0b7682ac4ac6d739aa39c063997c7501 Mon Sep 17 00:00:00 2001
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From: Neil Armstrong <narmstrong@baylibre.com>
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Date: Thu, 14 Mar 2019 09:37:38 +0100
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Subject: [PATCH] WIP: drm/panfrost: add support for custom soft-reset on
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Amlogic GXM
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(cherry picked from commit 2e5230c1bf9cf01f035da72291cc460cb3b37096)
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---
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drivers/gpu/drm/panfrost/panfrost_gpu.c | 13 ++++++++++++-
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drivers/gpu/drm/panfrost/panfrost_regs.h | 4 ++++
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2 files changed, 16 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c
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index 58ef25573cda3a..2218fa9130a49d 100644
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--- a/drivers/gpu/drm/panfrost/panfrost_gpu.c
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+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c
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@@ -7,7 +7,9 @@
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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+#include <linux/reset.h>
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#include <linux/io.h>
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+#include <linux/of.h>
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#include <linux/iopoll.h>
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#include <linux/platform_device.h>
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@@ -55,7 +57,16 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev)
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gpu_write(pfdev, GPU_INT_MASK, 0);
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gpu_write(pfdev, GPU_INT_CLEAR, GPU_IRQ_RESET_COMPLETED);
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- gpu_write(pfdev, GPU_CMD, GPU_CMD_SOFT_RESET);
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+
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+ if (of_device_is_compatible(pfdev->dev->of_node, "amlogic,meson-gxm-mali")) {
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+ reset_control_assert(pfdev->rstc);
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+ udelay(10);
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+ reset_control_deassert(pfdev->rstc);
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+
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+ gpu_write(pfdev, GPU_PWR_KEY, 0x2968A819);
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+ gpu_write(pfdev, GPU_PWR_OVERRIDE1, 0xfff | (0x20 << 16));
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+ } else
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+ gpu_write(pfdev, GPU_CMD, GPU_CMD_SOFT_RESET);
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ret = readl_relaxed_poll_timeout(pfdev->iomem + GPU_INT_RAWSTAT,
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val, val & GPU_IRQ_RESET_COMPLETED, 100, 10000);
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diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h
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index 578c5fc2188b63..d61b2cd0a99b66 100644
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--- a/drivers/gpu/drm/panfrost/panfrost_regs.h
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+++ b/drivers/gpu/drm/panfrost/panfrost_regs.h
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@@ -50,6 +50,10 @@
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#define GPU_FAULT_ADDRESS_LO 0x40
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#define GPU_FAULT_ADDRESS_HI 0x44
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+#define GPU_PWR_KEY 0x050 /* (WO) Power manager key register */
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+#define GPU_PWR_OVERRIDE0 0x054 /* (RW) Power manager override settings */
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+#define GPU_PWR_OVERRIDE1 0x058 /* (RW) Power manager override settings */
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+
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#define GPU_THREAD_MAX_THREADS 0x0A0 /* (RO) Maximum number of threads per core */
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#define GPU_THREAD_MAX_WORKGROUP_SIZE 0x0A4 /* (RO) Maximum workgroup size */
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#define GPU_THREAD_MAX_BARRIER_SIZE 0x0A8 /* (RO) Maximum threads waiting at a barrier */
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