mirror of
https://github.com/Fishwaldo/build.git
synced 2025-03-23 15:21:39 +00:00
81 lines
2 KiB
Diff
81 lines
2 KiB
Diff
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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index 02c0385f..19a8657b 100644
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--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
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@@ -51,6 +51,11 @@
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#address-cells = <1>;
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#size-cells = <1>;
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+ aliases {
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+ spi0 = &spi0;
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+ spi1 = &spi1;
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+ };
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+
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -304,6 +309,27 @@
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function = "emac";
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drive-strength = <40>;
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};
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+
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+ spi0_pins_a: spi0@0 {
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+ pins = "PC0", "PC1", "PC2";
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+ function = "spi0";
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+ };
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+
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+ spi0_cs0_pins_a: spi0_cs0@0 {
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+ pins = "PC3";
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+ function = "spi0";
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+ };
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+
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+ spi1_pins_a: spi1@0 {
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+ pins = "PD1", "PD2", "PD3";
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+ function = "spi1";
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+ };
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+
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+ spi1_cs0_pins_a: spi1_cs0@0 {
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+ pins = "PD0";
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+ function = "spi1";
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+ };
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+
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};
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uart0: serial@1c28000 {
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@@ -431,5 +457,36 @@
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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};
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+
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+ spi0: spi@01c68000 {
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+ compatible = "allwinner,sun8i-h3-spi";
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+ reg = <0x01c68000 0x1000>;
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+ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
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+ pinctrl-names = "default", "sleep";
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+ pinctrl-0 = <&spi0_pins_a>, <&spi0_cs0_pins_a>;
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+ clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
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+ clock-names = "ahb", "mod";
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+ clock-frequency = <0x5f5e100>;
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+ resets = <&ccu RST_BUS_SPI0>;
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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+ spi1: spi@01c69000 {
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+ compatible = "allwinner,sun8i-h3-spi";
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+ reg = <0x01c69000 0x1000>;
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+ interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
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+ pinctrl-names = "default", "sleep";
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+ pinctrl-0 = <&spi1_pins_a>, <&spi1_cs0_pins_a>;
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+ clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
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+ clock-names = "ahb", "mod";
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+ clock-frequency = <0x5f5e100>;
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+ resets = <&ccu RST_BUS_SPI1>;
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+ status = "disabled";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+
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};
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};
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