mirror of
https://github.com/Fishwaldo/build.git
synced 2025-03-27 17:21:34 +00:00
* Initial Mvebu RFC https://github.com/armbian/build/issues/1426
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
* mvebu: add missing patches
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
* mvebu: change making u-boot targets to standard way, adjust patches and config
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
* helios4: set default branch to use U-Boot 2018.11
Switch over to U-Boot 2018.11 that has been used for some time in next
branch.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: helios4: Enable DEV branch
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* u-boot: Add RTC support on Clearfog and Helios4
Added DM driver for mvebu RTC and enable it on Clearfog and Helios4
configuration.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* add boot-marvell.cmd backward compatibility
The patches added missing variable that used on boot-marvell.cmd and
also adjust the some memory addresses to prevent crash due to usage of
fdt_high and initrd_high.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* helios4: Added SPI NOR flash target
Build bootable SPI NOR flash image.
Change the boot order to USB -> SATA -> MMC
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* Restore SPI support on U-Boot 2019.04
* mvebu: kernel: Added Wake-On-GPIO and WoL support
The patch set was missing during transition.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* [#1429] SolidRun's ARMADA A388 SOM U-Boot ODT Update
Old versions of U-Boot did not configure correctly the ODT on data
signals of DDR RAM on SolidRun's ARMADA A388 SOMs.
According to SolidRun Knowledge Base, the changes already pushed to
mainline U-Boot. But then it was overwritten when Marvell DDR Training
Tool updated
[URL]
https://developer.solid-run.com/knowledge-base/armada-38x-som-u-boot-odt-update/
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* [#1429] mvebu: u-boot: Add revision id for Armada 38x B0
Added patch for SolidRun U-Boot v2018.01 and
for Helios4 U-Boot v2018.11
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* clearfog: Added SPI NOR flash target
Build bootable SPI NOR flash image.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: clearfog: DEV branch use mainline U-Boot
Also move clearfog base patch into its own board folder.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: enable U-Boot uart target
Normal MMC image can be used for uart boot using following command:
./tools/kwboot -b u-boot-spl.kwb /dev/ttyUSBX
But on Helios4, the SPL failed to continue the booting process if ECC is
enabled, so disable it.
Since the usage of uart boot is more for rescue/debug, disable autoboot.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: NEXT branch use mainline U-Boot
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: helios4: fix fancontrol related bug during buster testing
- On kernel 4.19, cpu thermal sensor changed the name from
armada_thermal into f10e4078.thermal. Added this new name to udev rules
- Since DEFAULT branch now use kernel 4.14, update fancontrol
configuration
- Load lm75 kernel module
- On kernel 4.19, cpu temp reading about 20 degree C lower, update
fancontrol configuration.
[URL]
https://forum.armbian.com/topic/10214-clearfogpro-possible-change-in-temperature-reporting-between-414next-and-419dev
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: helios4: Override vendor provided fancontrol unit
systemd emit following message on dmesg
systemd[1]: /lib/systemd/system/fancontrol.service:9: PIDFile=
references path below legacy directory /var/run/, updating
/var/run/fancontrol.pid \xe2\x86\x92 /run/fancontrol.pid; please update
the unit file accordingly.
Override and change the value in the unit file to remove the message.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: DEV branch use its own u-boot patch folder
The patches are copied over from u-boot-mvebu-next
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: u-boot: Make clearfog model distinction more obvious
While at it, also change SerDes LANE4 into USB 3.0 on Clearfog Base.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* lib: Use apt-get install instead of dpkg on install_deb_chroot()
dpkg -i does not install dependencies required by the package.
This is needed if the BSP package requires other package that is not
installed during debootstrap.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* config: mvebu: helios4: Move various tweak to family_tweak_bsp()
Various tweak in family_tweaks_s() only applied to SD card image.
Move it to family_tweaks_bsp() so it will also included on the BSP
package and applied to existing user.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* config: mvebu: helios4: Add /etc/modules to BSP
On kernel 4.19, user need to modify the /etc/modules to add lm75 kernel
module. Pack the file into BSP so user no longer needed to modify it.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: kernel: Make zbud as built-in module
To remove the following error:
[ 1.705485] zswap: default zpool zbud not available
[ 1.705488] zswap: pool creation failed
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* bootscripts: mvebu: Add default value for spi_workaround
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: kernel: Backport armada_thermal changes to 4.14 (#1452)
On kernel 4.19, armada_thermal driver has been fixed to address
Marvell's Errata #132698 (The changes first appear on LK 4.16). The
result is temperature reading is around 20 degree Celsius lower.
Currently armbian-motd apply -20C tweak for both LK 4.14 and LK 4.19
which is incorrect. Instead of adding some logic on what condition to
apply the tweak, it is better to remove the tweak and patch the kernel
instead.
Revert commit b3dd4e9
("[ mvebu ] Put back Armada temperature tweak in
motd")
which is part of #1421 solution.
[URL]
https://forum.armbian.com/topic/10214-clearfogpro-possible-change-in-temperature-reporting-between-414next-and-419dev/
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: helios4: unified fancontrol config
Since LK 4.14 on DEFAULT branch already patched and the temp reading is
same as LK 4.19 on NEXT branch, it is no longer needed to separate
fancontrol configuration file.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* u-boot: helios4: Remove rev id patch
The patch is already applied in helios4 repo, no need to have it in
armbian.
This revert helios4 part of commit 7411c55
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* u-boot: clearfog: enable PCIe support and PCIe reset
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* u-boot: clearfog: add boot-marvell.cmd backward compatibility
The patches added missing variable that used on boot-marvell.cmd and
also adjust the some memory addresses to prevent crash due to usage of
fdt_high and initrd_high.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu: helios4: tweak regarding temperature setting
Make fan speed similar compared to pre-patched armada-thermal. Target
PWM value around 70 during idle.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* config: sources: clearfog to use u-boot 2018.01 for NEXT branch
This changes also affect Helios4. Moved the shared U-Boot source setting
back to Helios4 for NEXT branch.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* config: boards: build Stretch image for Clearfog and Helios4
Also remove DEV from Helios4 CLI_TARGET
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* kernel: mvebu-next: Disable access to SPI Flash
User need to set spi_workaround=yes to enable SPI Flash access and lost
access to internal SATA.
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu-next: adjust kernel config
* mvebu-dev: bump to 5.2 and adjust kernel configuraion. Tested for building.
* Adjust kernel config, add AUFS
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
* mvebu-next: Adjust kernel config, add debug GPIO
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
* mvebu-dev: separate Clearfog Base U-boot configuration file and patch
Signed-off-by: Aditya Prayoga <aditya@kobol.io>
305 lines
8.8 KiB
Diff
305 lines
8.8 KiB
Diff
diff --git a/drivers/thermal/armada_thermal.c b/drivers/thermal/armada_thermal.c
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index ae7532894..a23a5c7f0 100644
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--- a/drivers/thermal/armada_thermal.c
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+++ b/drivers/thermal/armada_thermal.c
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@@ -23,8 +23,7 @@
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <linux/thermal.h>
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-
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-#define THERMAL_VALID_MASK 0x1
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+#include <linux/iopoll.h>
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/* Thermal Manager Control and Status Register */
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#define PMU_TDC0_SW_RST_MASK (0x1 << 1)
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@@ -39,14 +38,33 @@
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#define A375_UNIT_CONTROL_MASK 0x7
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#define A375_READOUT_INVERT BIT(15)
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#define A375_HW_RESETn BIT(8)
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-#define A380_HW_RESET BIT(8)
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+
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+/* Legacy bindings */
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+#define LEGACY_CONTROL_MEM_LEN 0x4
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+
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+/* Current bindings with the 2 control registers under the same memory area */
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+#define LEGACY_CONTROL1_OFFSET 0x0
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+#define CONTROL0_OFFSET 0x0
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+#define CONTROL1_OFFSET 0x4
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+
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+/* Errata fields */
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+#define CONTROL0_TSEN_TC_TRIM_MASK 0x7
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+#define CONTROL0_TSEN_TC_TRIM_VAL 0x3
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+
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+/* EXT_TSEN refers to the external temperature sensors, out of the AP */
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+#define CONTROL1_EXT_TSEN_SW_RESET BIT(7)
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+#define CONTROL1_EXT_TSEN_HW_RESETn BIT(8)
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+
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+#define STATUS_POLL_PERIOD_US 1000
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+#define STATUS_POLL_TIMEOUT_US 100000
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struct armada_thermal_data;
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/* Marvell EBU Thermal Sensor Dev Structure */
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struct armada_thermal_priv {
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- void __iomem *sensor;
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- void __iomem *control;
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+ void __iomem *status;
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+ void __iomem *control0;
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+ void __iomem *control1;
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struct armada_thermal_data *data;
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};
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@@ -58,7 +76,7 @@ struct armada_thermal_data {
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/* Test for a valid sensor value (optional) */
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bool (*is_valid)(struct armada_thermal_priv *);
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- /* Formula coeficients: temp = (b + m * reg) / div */
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+ /* Formula coeficients: temp = (b - m * reg) / div */
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unsigned long coef_b;
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unsigned long coef_m;
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unsigned long coef_div;
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@@ -67,91 +85,111 @@ struct armada_thermal_data {
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/* Register shift and mask to access the sensor temperature */
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unsigned int temp_shift;
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unsigned int temp_mask;
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- unsigned int is_valid_shift;
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+ u32 is_valid_bit;
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+ bool needs_control0;
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};
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static void armadaxp_init_sensor(struct platform_device *pdev,
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struct armada_thermal_priv *priv)
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{
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- unsigned long reg;
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+ u32 reg;
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- reg = readl_relaxed(priv->control);
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+ reg = readl_relaxed(priv->control1);
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reg |= PMU_TDC0_OTF_CAL_MASK;
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- writel(reg, priv->control);
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+ writel(reg, priv->control1);
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/* Reference calibration value */
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reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
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reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
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- writel(reg, priv->control);
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+ writel(reg, priv->control1);
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/* Reset the sensor */
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- reg = readl_relaxed(priv->control);
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- writel((reg | PMU_TDC0_SW_RST_MASK), priv->control);
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+ reg = readl_relaxed(priv->control1);
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+ writel((reg | PMU_TDC0_SW_RST_MASK), priv->control1);
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- writel(reg, priv->control);
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+ writel(reg, priv->control1);
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/* Enable the sensor */
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- reg = readl_relaxed(priv->sensor);
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+ reg = readl_relaxed(priv->status);
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reg &= ~PMU_TM_DISABLE_MASK;
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- writel(reg, priv->sensor);
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+ writel(reg, priv->status);
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}
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static void armada370_init_sensor(struct platform_device *pdev,
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struct armada_thermal_priv *priv)
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{
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- unsigned long reg;
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+ u32 reg;
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- reg = readl_relaxed(priv->control);
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+ reg = readl_relaxed(priv->control1);
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reg |= PMU_TDC0_OTF_CAL_MASK;
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- writel(reg, priv->control);
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+ writel(reg, priv->control1);
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/* Reference calibration value */
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reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
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reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
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- writel(reg, priv->control);
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+ writel(reg, priv->control1);
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reg &= ~PMU_TDC0_START_CAL_MASK;
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- writel(reg, priv->control);
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+ writel(reg, priv->control1);
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- mdelay(10);
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+ msleep(10);
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}
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static void armada375_init_sensor(struct platform_device *pdev,
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struct armada_thermal_priv *priv)
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{
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- unsigned long reg;
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+ u32 reg;
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- reg = readl(priv->control + 4);
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+ reg = readl(priv->control1);
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reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
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reg &= ~A375_READOUT_INVERT;
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reg &= ~A375_HW_RESETn;
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- writel(reg, priv->control + 4);
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- mdelay(20);
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+ writel(reg, priv->control1);
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+ msleep(20);
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reg |= A375_HW_RESETn;
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- writel(reg, priv->control + 4);
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- mdelay(50);
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+ writel(reg, priv->control1);
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+ msleep(50);
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+}
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+
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+static void armada_wait_sensor_validity(struct armada_thermal_priv *priv)
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+{
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+ u32 reg;
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+
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+ readl_relaxed_poll_timeout(priv->status, reg,
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+ reg & priv->data->is_valid_bit,
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+ STATUS_POLL_PERIOD_US,
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+ STATUS_POLL_TIMEOUT_US);
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}
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static void armada380_init_sensor(struct platform_device *pdev,
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struct armada_thermal_priv *priv)
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{
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- unsigned long reg = readl_relaxed(priv->control);
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-
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- /* Reset hardware once */
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- if (!(reg & A380_HW_RESET)) {
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- reg |= A380_HW_RESET;
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- writel(reg, priv->control);
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- mdelay(10);
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+ u32 reg = readl_relaxed(priv->control1);
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+
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+ /* Disable the HW/SW reset */
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+ reg |= CONTROL1_EXT_TSEN_HW_RESETn;
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+ reg &= ~CONTROL1_EXT_TSEN_SW_RESET;
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+ writel(reg, priv->control1);
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+
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+ /* Set Tsen Tc Trim to correct default value (errata #132698) */
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+ if (priv->control0) {
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+ reg = readl_relaxed(priv->control0);
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+ reg &= ~CONTROL0_TSEN_TC_TRIM_MASK;
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+ reg |= CONTROL0_TSEN_TC_TRIM_VAL;
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+ writel(reg, priv->control0);
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}
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+
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+ /* Wait the sensors to be valid or the core will warn the user */
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+ armada_wait_sensor_validity(priv);
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}
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static bool armada_is_valid(struct armada_thermal_priv *priv)
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{
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- unsigned long reg = readl_relaxed(priv->sensor);
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+ u32 reg = readl_relaxed(priv->status);
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- return (reg >> priv->data->is_valid_shift) & THERMAL_VALID_MASK;
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+ return reg & priv->data->is_valid_bit;
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}
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static int armada_get_temp(struct thermal_zone_device *thermal,
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@@ -168,7 +206,7 @@ static int armada_get_temp(struct thermal_zone_device *thermal,
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return -EIO;
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}
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- reg = readl_relaxed(priv->sensor);
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+ reg = readl_relaxed(priv->status);
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reg = (reg >> priv->data->temp_shift) & priv->data->temp_mask;
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/* Get formula coeficients */
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@@ -199,7 +237,7 @@ static const struct armada_thermal_data armadaxp_data = {
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static const struct armada_thermal_data armada370_data = {
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.is_valid = armada_is_valid,
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.init_sensor = armada370_init_sensor,
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- .is_valid_shift = 9,
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+ .is_valid_bit = BIT(9),
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.temp_shift = 10,
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.temp_mask = 0x1ff,
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.coef_b = 3153000000UL,
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@@ -210,24 +248,26 @@ static const struct armada_thermal_data armada370_data = {
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static const struct armada_thermal_data armada375_data = {
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.is_valid = armada_is_valid,
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.init_sensor = armada375_init_sensor,
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- .is_valid_shift = 10,
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+ .is_valid_bit = BIT(10),
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.temp_shift = 0,
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.temp_mask = 0x1ff,
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.coef_b = 3171900000UL,
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.coef_m = 10000000UL,
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.coef_div = 13616,
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+ .needs_control0 = true,
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};
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static const struct armada_thermal_data armada380_data = {
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.is_valid = armada_is_valid,
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.init_sensor = armada380_init_sensor,
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- .is_valid_shift = 10,
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+ .is_valid_bit = BIT(10),
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.temp_shift = 0,
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.temp_mask = 0x3ff,
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.coef_b = 1172499100UL,
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.coef_m = 2000096UL,
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.coef_div = 4201,
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.inverted = true,
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+ .needs_control0 = true,
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};
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static const struct of_device_id armada_thermal_id_table[] = {
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@@ -255,6 +295,7 @@ MODULE_DEVICE_TABLE(of, armada_thermal_id_table);
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static int armada_thermal_probe(struct platform_device *pdev)
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{
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+ void __iomem *control = NULL;
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struct thermal_zone_device *thermal;
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const struct of_device_id *match;
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struct armada_thermal_priv *priv;
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@@ -268,17 +309,39 @@ static int armada_thermal_probe(struct platform_device *pdev)
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if (!priv)
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return -ENOMEM;
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+ priv->data = (struct armada_thermal_data *)match->data;
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+
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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- priv->sensor = devm_ioremap_resource(&pdev->dev, res);
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- if (IS_ERR(priv->sensor))
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- return PTR_ERR(priv->sensor);
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+ priv->status = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(priv->status))
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+ return PTR_ERR(priv->status);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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- priv->control = devm_ioremap_resource(&pdev->dev, res);
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- if (IS_ERR(priv->control))
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- return PTR_ERR(priv->control);
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- priv->data = (struct armada_thermal_data *)match->data;
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+ /* Calculate control0 address and edit the resource start address and
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+ * length to map over all the registers */
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+ if (priv->data->needs_control0)
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+ res->start -= CONTROL1_OFFSET;
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+
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+ control = devm_ioremap_resource(&pdev->dev, res);
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+ if (IS_ERR(control))
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+ return PTR_ERR(control);
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+
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+ dev_info(&pdev->dev, "res size = %d\n", resource_size(res));
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+
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+ /*
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+ * Legacy DT bindings only described "control1" register (also referred
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+ * as "control MSB" on old documentation). New bindings cover
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+ * "control0/control LSB" and "control1/control MSB" registers within
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+ * the same resource, which is then of size 8 instead of 4.
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+ */
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+ if (resource_size(res) == LEGACY_CONTROL_MEM_LEN) {
|
|
+ priv->control1 = control + LEGACY_CONTROL1_OFFSET;
|
|
+ } else {
|
|
+ priv->control0 = control + CONTROL0_OFFSET;
|
|
+ priv->control1 = control + CONTROL1_OFFSET;
|
|
+ }
|
|
+
|
|
priv->data->init_sensor(pdev, priv);
|
|
|
|
thermal = thermal_zone_device_register("armada_thermal", 0, 0,
|