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23604e8a0d
* Introducing Rockchip rk322x SoC support Main features: - Legacy kernel flavour based upon stable v2.x rk3288 Rockchip branch (https://github.com/rockchip-linux/kernel/tree/stable-4.4-rk3288-linux-v2.x) - Current kernel flavour based on mainline 5.6.y kernel - Mainline u-boot (v2020.04) - Single generic tv box target (rk322x-box) which boots on all the known tv boxes - Hardware devices (eMMC/NAND, led wiring configuration, SoC variant selection) modulation done by user at runtime via device tree overlays - a script (rk322x-config) is provided for autodetection and simple configuration by inexperienced users; - Bits added to armbian-hardware-optimization to set affinity for irq handlers - rk322x-box targets already added to targets.conf for automatic image creation * Removed disabled patches * Restored mysteriously removed comment character
219 lines
4.5 KiB
Diff
219 lines
4.5 KiB
Diff
diff --git a/arch/arm/boot/dts/rk322x-box.dts b/arch/arm/boot/dts/rk322x-box.dts
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new file mode 100644
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index 000000000..6f2833a50
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--- /dev/null
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+++ b/arch/arm/boot/dts/rk322x-box.dts
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@@ -0,0 +1,213 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+/dts-v1/;
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+
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+#include "rk3228a-box.dtsi"
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+
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+/ {
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+
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+ model = "Generic RK322x Tv Box board";
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+
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+ /delete-node/ leds;
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+
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+ gpio_leds: gpio-leds {
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+
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+ compatible = "gpio-leds";
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+
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+ /*
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+ * Working led, available on all boards
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+ */
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+ working {
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+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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+ label = "working";
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+ default-state = "on";
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+ linux,default-trigger = "timer";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gpio_led_working>;
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+ };
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+
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+ };
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+
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+};
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+
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+&emmc {
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+ status = "okay";
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+ /delete-property/ mmc-ddr-1_8v;
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+ /delete-property/ pinctrl-names;
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+ /delete-property/ pinctrl-0;
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+ rockchip,default-sample-phase = <180>;
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+};
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+
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+&nfc {
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+ status = "okay";
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+};
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+
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+&gmac {
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+ tx_delay = <0x26>;
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+ rx_delay = <0x11>;
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+};
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+
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+&ir_receiver {
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+ status = "okay";
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+};
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+
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+&power_key {
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+ status = "okay";
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+};
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+
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+&usb_otg {
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+ dr_mode = "host";
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+};
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+
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+&sdio {
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+ mmc-pwrseq = <&sdio_pwrseq>;
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+ status = "okay";
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+};
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+
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+&sdmmc {
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+ status = "okay";
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+};
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+
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+/** Integration to pin controller */
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+&pinctrl {
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+
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+ pcfg_pull_up_12ma: pcfg-pull-up-12ma {
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+ drive-strength = <12>;
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+ bias-pull-up;
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+ };
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+
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+ pcfg_pull_down_12ma: pcfg-pull-down-12ma {
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+ drive-strength = <12>;
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+ bias-pull-down;
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+ };
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+
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+ pcfg_pull_none_12ma: pcfg-pull-none-12ma {
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+ drive-strength = <12>;
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+ bias-disable;
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+ };
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+
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+ pcfg_pull_up_2ma: pcfg-pull-up-2ma {
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+ drive-strength = <2>;
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+ bias-pull-up;
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+ };
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+
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+ pcfg_pull_down_2ma: pcfg-pull-down-2ma {
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+ drive-strength = <2>;
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+ bias-pull-down;
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+ };
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+
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+ pcfg_pull_none_2ma: pcfg-pull-none-2ma {
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+ drive-strength = <2>;
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+ bias-disable;
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+ };
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+
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+ /*
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+ * Some rk322x electrical schemes report this kind of pull-up/down
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+ * pin configurations. We set them here, but we don't use it in this
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+ * device tree. These instead are useful for overlays, because they seem
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+ * to increase stability on at least one board I got here
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+ */
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+ sdmmc {
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+ sdmmc_clk: sdmmc-clk {
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+ rockchip,pins = <1 16 RK_FUNC_1 &pcfg_pull_down>;
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+ };
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+
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+ sdmmc_cmd: sdmmc-cmd {
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+ rockchip,pins = <1 15 RK_FUNC_1 &pcfg_pull_up>;
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+ };
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+
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+ sdmmc_bus4: sdmmc-bus4 {
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+ rockchip,pins = <1 18 RK_FUNC_1 &pcfg_pull_up>,
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+ <1 19 RK_FUNC_1 &pcfg_pull_up>,
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+ <1 20 RK_FUNC_1 &pcfg_pull_up>,
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+ <1 21 RK_FUNC_1 &pcfg_pull_up>;
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+ };
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+ };
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+
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+ /*
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+ * Same as above, decreasing strength of SDIO pins seems to be benefical
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+ * to stability
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+ */
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+ sdio {
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+ sdio_clk: sdio-clk {
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+ rockchip,pins = <3 0 RK_FUNC_1 &pcfg_pull_down_2ma>;
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+ };
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+
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+ sdio_cmd: sdio-cmd {
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+ rockchip,pins = <3 1 RK_FUNC_1 &pcfg_pull_up_2ma>;
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+ };
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+
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+ sdio_bus4: sdio-bus4 {
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+ rockchip,pins = <3 2 RK_FUNC_1 &pcfg_pull_up_2ma>,
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+ <3 3 RK_FUNC_1 &pcfg_pull_up_2ma>,
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+ <3 4 RK_FUNC_1 &pcfg_pull_up_2ma>,
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+ <3 5 RK_FUNC_1 &pcfg_pull_up_2ma>;
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+ };
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+ };
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+
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+ /*
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+ * Same drill as above, electrical schemes also report this pull-up/down
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+ * configurations.
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+ */
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+ emmc {
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+ emmc_clk: emmc-clk {
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+ rockchip,pins = <2 7 RK_FUNC_2 &pcfg_pull_up>;
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+ };
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+
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+ emmc_cmd: emmc-cmd {
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+ rockchip,pins = <1 22 RK_FUNC_2 &pcfg_pull_up>;
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+ };
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+
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+ emmc_bus8: emmc-bus8 {
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+ rockchip,pins = <1 24 RK_FUNC_2 &pcfg_pull_up>,
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+ <1 25 RK_FUNC_2 &pcfg_pull_up>,
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+ <1 26 RK_FUNC_2 &pcfg_pull_up>,
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+ <1 27 RK_FUNC_2 &pcfg_pull_up>,
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+ <1 28 RK_FUNC_2 &pcfg_pull_up>,
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+ <1 29 RK_FUNC_2 &pcfg_pull_up>,
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+ <1 30 RK_FUNC_2 &pcfg_pull_up>,
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+ <1 31 RK_FUNC_2 &pcfg_pull_up>;
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+ };
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+
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+ emmc_pwr: emmc-pwr {
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+ rockchip,pins = <2 RK_PA5 RK_FUNC_2 &pcfg_pull_down>;
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+ };
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+
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+ emmc_rst: emmc-rst {
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+ rockchip,pins = <1 RK_PC7 RK_FUNC_2 &pcfg_pull_up>;
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+ };
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+
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+ };
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+
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+
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+ gpio {
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+ gpio_led_working: gpio-led-working {
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+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ ir {
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+ ir_int: ir-int {
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+ rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ keys {
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+ pwr_key: pwr-key {
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+ rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+
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+ sdio-pwrseq {
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+ wifi_enable_h: wifi-enable-h {
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+ rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ gpio {
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+ gpio_led_working: gpio-led-working {
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+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+};
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