mirror of
https://github.com/Fishwaldo/build.git
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e72ddf2808
Adds preliminary patches for 4.19 Known Issues: - Does not like a lot of HDMI adapters Needs tested by anyone with a Le Potato, Odroid C2, or Nanopi K2
399 lines
13 KiB
Diff
399 lines
13 KiB
Diff
From c71ba17b0625595a2c0268cb76b7032694550fb3 Mon Sep 17 00:00:00 2001
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From: Maxime Jourdan <maxi.jourdan@wanadoo.fr>
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Date: Wed, 1 Aug 2018 20:51:28 +0200
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Subject: [PATCH] drm/meson: convert to the new canvas module
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This removes the meson_canvas files within the meson/drm layer
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and makes use of the new canvas module that is referenced in the dts.
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Canvases can be used by different IPs and modules, and it is as such
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preferable to rely on a module that can safely dispatch canvases on
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demand.
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Signed-off-by: Maxime Jourdan <maxi.jourdan@wanadoo.fr>
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---
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.../bindings/display/amlogic,meson-vpu.txt | 9 +--
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arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 7 ++-
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drivers/gpu/drm/meson/Kconfig | 1 +
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drivers/gpu/drm/meson/Makefile | 2 +-
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drivers/gpu/drm/meson/meson_canvas.c | 70 ----------------------
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drivers/gpu/drm/meson/meson_canvas.h | 42 -------------
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drivers/gpu/drm/meson/meson_crtc.c | 5 +-
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drivers/gpu/drm/meson/meson_drv.c | 35 ++++++-----
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drivers/gpu/drm/meson/meson_drv.h | 5 +-
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drivers/gpu/drm/meson/meson_plane.c | 3 +-
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drivers/gpu/drm/meson/meson_viu.c | 1 -
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11 files changed, 39 insertions(+), 141 deletions(-)
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delete mode 100644 drivers/gpu/drm/meson/meson_canvas.c
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delete mode 100644 drivers/gpu/drm/meson/meson_canvas.h
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diff --git a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt
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index 057b813..60b6e13 100644
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--- a/Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt
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+++ b/Documentation/devicetree/bindings/display/amlogic,meson-vpu.txt
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@@ -60,9 +60,9 @@ Required properties:
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- reg: base address and size of he following memory-mapped regions :
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- vpu
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- hhi
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- - dmc
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- reg-names: should contain the names of the previous memory regions
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- interrupts: should contain the VENC Vsync interrupt number
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+- amlogic,canvas: should point to a meson canvas provider node
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Optional properties:
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- power-domains: Optional phandle to associated power domain as described in
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@@ -98,13 +98,14 @@ tv-connector {
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vpu: vpu@d0100000 {
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compatible = "amlogic,meson-gxbb-vpu";
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reg = <0x0 0xd0100000 0x0 0x100000>,
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- <0x0 0xc883c000 0x0 0x1000>,
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- <0x0 0xc8838000 0x0 0x1000>;
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- reg-names = "vpu", "hhi", "dmc";
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+ <0x0 0xc883c000 0x0 0x1000>;
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+ reg-names = "vpu", "hhi";
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interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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+ amlogic,canvas = <&canvas>;
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+
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/* CVBS VDAC output port */
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port@0 {
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reg = <0>;
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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index 25e195f..7296b4f 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
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@@ -538,13 +538,14 @@
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vpu: vpu@d0100000 {
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compatible = "amlogic,meson-gx-vpu";
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reg = <0x0 0xd0100000 0x0 0x100000>,
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- <0x0 0xc883c000 0x0 0x1000>,
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- <0x0 0xc8838000 0x0 0x1000>;
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- reg-names = "vpu", "hhi", "dmc";
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+ <0x0 0xc883c000 0x0 0x1000>;
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+ reg-names = "vpu", "hhi";
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interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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+ amlogic,canvas = <&canvas>;
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+
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/* CVBS VDAC output port */
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cvbs_vdac_port: port@0 {
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reg = <0>;
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diff --git a/drivers/gpu/drm/meson/Kconfig b/drivers/gpu/drm/meson/Kconfig
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index 02d400b..8929058 100644
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--- a/drivers/gpu/drm/meson/Kconfig
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+++ b/drivers/gpu/drm/meson/Kconfig
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@@ -7,6 +7,7 @@ config DRM_MESON
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select DRM_GEM_CMA_HELPER
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select VIDEOMODE_HELPERS
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select REGMAP_MMIO
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+ select MESON_CANVAS
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config DRM_MESON_DW_HDMI
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tristate "HDMI Synopsys Controller support for Amlogic Meson Display"
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diff --git a/drivers/gpu/drm/meson/Makefile b/drivers/gpu/drm/meson/Makefile
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index c5c4cc3..bd67429 100644
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--- a/drivers/gpu/drm/meson/Makefile
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+++ b/drivers/gpu/drm/meson/Makefile
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@@ -1,5 +1,5 @@
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meson-drm-y := meson_drv.o meson_plane.o meson_crtc.o meson_venc_cvbs.o
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-meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o meson_canvas.o
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+meson-drm-y += meson_viu.o meson_vpp.o meson_venc.o meson_vclk.o
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obj-$(CONFIG_DRM_MESON) += meson-drm.o
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obj-$(CONFIG_DRM_MESON_DW_HDMI) += meson_dw_hdmi.o
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diff --git a/drivers/gpu/drm/meson/meson_canvas.c b/drivers/gpu/drm/meson/meson_canvas.c
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deleted file mode 100644
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index 08f6073..0000000
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--- a/drivers/gpu/drm/meson/meson_canvas.c
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+++ /dev/null
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@@ -1,70 +0,0 @@
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-/*
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- * Copyright (C) 2016 BayLibre, SAS
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- * Author: Neil Armstrong <narmstrong@baylibre.com>
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- * Copyright (C) 2015 Amlogic, Inc. All rights reserved.
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- * Copyright (C) 2014 Endless Mobile
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License as
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- * published by the Free Software Foundation; either version 2 of the
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- * License, or (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful, but
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- * WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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- * General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program; if not, see <http://www.gnu.org/licenses/>.
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- */
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-
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-#include <linux/kernel.h>
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-#include <linux/module.h>
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-#include "meson_drv.h"
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-#include "meson_canvas.h"
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-#include "meson_registers.h"
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-
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-/**
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- * DOC: Canvas
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- *
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- * CANVAS is a memory zone where physical memory frames information
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- * are stored for the VIU to scanout.
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- */
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-
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-/* DMC Registers */
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-#define DMC_CAV_LUT_DATAL 0x48 /* 0x12 offset in data sheet */
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-#define CANVAS_WIDTH_LBIT 29
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-#define CANVAS_WIDTH_LWID 3
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-#define DMC_CAV_LUT_DATAH 0x4c /* 0x13 offset in data sheet */
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-#define CANVAS_WIDTH_HBIT 0
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-#define CANVAS_HEIGHT_BIT 9
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-#define CANVAS_BLKMODE_BIT 24
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-#define DMC_CAV_LUT_ADDR 0x50 /* 0x14 offset in data sheet */
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-#define CANVAS_LUT_WR_EN (0x2 << 8)
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-#define CANVAS_LUT_RD_EN (0x1 << 8)
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-
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-void meson_canvas_setup(struct meson_drm *priv,
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- uint32_t canvas_index, uint32_t addr,
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- uint32_t stride, uint32_t height,
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- unsigned int wrap,
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- unsigned int blkmode)
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-{
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- unsigned int val;
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-
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- regmap_write(priv->dmc, DMC_CAV_LUT_DATAL,
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- (((addr + 7) >> 3)) |
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- (((stride + 7) >> 3) << CANVAS_WIDTH_LBIT));
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-
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- regmap_write(priv->dmc, DMC_CAV_LUT_DATAH,
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- ((((stride + 7) >> 3) >> CANVAS_WIDTH_LWID) <<
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- CANVAS_WIDTH_HBIT) |
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- (height << CANVAS_HEIGHT_BIT) |
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- (wrap << 22) |
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- (blkmode << CANVAS_BLKMODE_BIT));
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-
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- regmap_write(priv->dmc, DMC_CAV_LUT_ADDR,
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- CANVAS_LUT_WR_EN | canvas_index);
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-
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- /* Force a read-back to make sure everything is flushed. */
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- regmap_read(priv->dmc, DMC_CAV_LUT_DATAH, &val);
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-}
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diff --git a/drivers/gpu/drm/meson/meson_canvas.h b/drivers/gpu/drm/meson/meson_canvas.h
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deleted file mode 100644
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index af1759d..0000000
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--- a/drivers/gpu/drm/meson/meson_canvas.h
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+++ /dev/null
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@@ -1,42 +0,0 @@
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-/*
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- * Copyright (C) 2016 BayLibre, SAS
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- * Author: Neil Armstrong <narmstrong@baylibre.com>
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- * Copyright (C) 2014 Endless Mobile
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License as
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- * published by the Free Software Foundation; either version 2 of the
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- * License, or (at your option) any later version.
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- *
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- * This program is distributed in the hope that it will be useful, but
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- * WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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- * General Public License for more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program; if not, see <http://www.gnu.org/licenses/>.
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- */
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-
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-/* Canvas LUT Memory */
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-
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-#ifndef __MESON_CANVAS_H
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-#define __MESON_CANVAS_H
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-
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-#define MESON_CANVAS_ID_OSD1 0x4e
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-
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-/* Canvas configuration. */
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-#define MESON_CANVAS_WRAP_NONE 0x00
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-#define MESON_CANVAS_WRAP_X 0x01
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-#define MESON_CANVAS_WRAP_Y 0x02
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-
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-#define MESON_CANVAS_BLKMODE_LINEAR 0x00
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-#define MESON_CANVAS_BLKMODE_32x32 0x01
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-#define MESON_CANVAS_BLKMODE_64x64 0x02
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-
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-void meson_canvas_setup(struct meson_drm *priv,
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- uint32_t canvas_index, uint32_t addr,
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- uint32_t stride, uint32_t height,
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- unsigned int wrap,
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- unsigned int blkmode);
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-
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-#endif /* __MESON_CANVAS_H */
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diff --git a/drivers/gpu/drm/meson/meson_crtc.c b/drivers/gpu/drm/meson/meson_crtc.c
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index 4dd0df0..7c8ad06 100644
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--- a/drivers/gpu/drm/meson/meson_crtc.c
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+++ b/drivers/gpu/drm/meson/meson_crtc.c
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@@ -36,7 +36,6 @@
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#include "meson_venc.h"
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#include "meson_vpp.h"
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#include "meson_viu.h"
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-#include "meson_canvas.h"
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#include "meson_registers.h"
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/* CRTC definition */
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@@ -199,10 +198,10 @@ void meson_crtc_irq(struct meson_drm *priv)
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} else
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meson_vpp_disable_interlace_vscaler_osd1(priv);
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- meson_canvas_setup(priv, MESON_CANVAS_ID_OSD1,
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+ priv->canvas_ops->setup(priv->canvas_id_osd1,
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priv->viu.osd1_addr, priv->viu.osd1_stride,
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priv->viu.osd1_height, MESON_CANVAS_WRAP_NONE,
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- MESON_CANVAS_BLKMODE_LINEAR);
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+ MESON_CANVAS_BLKMODE_LINEAR, 0);
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/* Enable OSD1 */
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writel_bits_relaxed(VPP_OSD1_POSTBLEND, VPP_OSD1_POSTBLEND,
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diff --git a/drivers/gpu/drm/meson/meson_drv.c b/drivers/gpu/drm/meson/meson_drv.c
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index d344312..de46833 100644
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--- a/drivers/gpu/drm/meson/meson_drv.c
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+++ b/drivers/gpu/drm/meson/meson_drv.c
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@@ -26,6 +26,7 @@
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#include <linux/platform_device.h>
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#include <linux/component.h>
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#include <linux/of_graph.h>
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+#include <linux/of_platform.h>
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#include <drm/drmP.h>
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#include <drm/drm_atomic.h>
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@@ -47,7 +48,6 @@
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#include "meson_vpp.h"
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#include "meson_viu.h"
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#include "meson_venc.h"
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-#include "meson_canvas.h"
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#include "meson_registers.h"
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#define DRIVER_NAME "meson"
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@@ -165,6 +165,8 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
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struct meson_drm *priv;
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struct drm_device *drm;
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struct resource *res;
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+ struct device_node *canvas;
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+ struct platform_device *canvas_pdev;
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void __iomem *regs;
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int ret;
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@@ -211,31 +213,35 @@ static int meson_drv_bind_master(struct device *dev, bool has_components)
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priv->hhi = devm_regmap_init_mmio(dev, regs,
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&meson_regmap_config);
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if (IS_ERR(priv->hhi)) {
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- dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
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+ dev_err(dev, "Couldn't create the HHI regmap\n");
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ret = PTR_ERR(priv->hhi);
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goto free_drm;
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}
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- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
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- if (!res) {
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- ret = -EINVAL;
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+ canvas = of_parse_phandle(dev->of_node, "amlogic,canvas", 0);
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+ if (!canvas) {
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+ ret = -ENODEV;
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goto free_drm;
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}
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- /* Simply ioremap since it may be a shared register zone */
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- regs = devm_ioremap(dev, res->start, resource_size(res));
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- if (!regs) {
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- ret = -EADDRNOTAVAIL;
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+
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+ canvas_pdev = of_find_device_by_node(canvas);
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+ if (!canvas_pdev) {
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+ dev_err(dev, "Unable to find canvas pdev\n");
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+ ret = -ENODEV;
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goto free_drm;
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}
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- priv->dmc = devm_regmap_init_mmio(dev, regs,
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- &meson_regmap_config);
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- if (IS_ERR(priv->dmc)) {
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- dev_err(&pdev->dev, "Couldn't create the DMC regmap\n");
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- ret = PTR_ERR(priv->dmc);
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+ priv->canvas_ops = dev_get_platdata(&canvas_pdev->dev);
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+ if (!priv->canvas_ops) {
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+ dev_err(dev, "canvas pdata structure NULL\n");
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+ ret = -EINVAL;
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goto free_drm;
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}
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+ ret = priv->canvas_ops->alloc(&priv->canvas_id_osd1);
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+ if (ret)
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+ goto free_drm;
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+
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priv->vsync_irq = platform_get_irq(pdev, 0);
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ret = drm_vblank_init(drm, 1);
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@@ -315,6 +321,7 @@ static void meson_drv_unbind(struct device *dev)
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struct drm_device *drm = dev_get_drvdata(dev);
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struct meson_drm *priv = drm->dev_private;
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+ priv->canvas_ops->free(priv->canvas_id_osd1);
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drm_dev_unregister(drm);
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drm_kms_helper_poll_fini(drm);
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drm_fbdev_cma_fini(priv->fbdev);
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diff --git a/drivers/gpu/drm/meson/meson_drv.h b/drivers/gpu/drm/meson/meson_drv.h
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index 8450d6ac..dfea959 100644
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--- a/drivers/gpu/drm/meson/meson_drv.h
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+++ b/drivers/gpu/drm/meson/meson_drv.h
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@@ -22,15 +22,18 @@
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/of.h>
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+#include <linux/soc/amlogic/meson-canvas.h>
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#include <drm/drmP.h>
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struct meson_drm {
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struct device *dev;
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void __iomem *io_base;
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struct regmap *hhi;
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- struct regmap *dmc;
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int vsync_irq;
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+ struct meson_canvas_platform_data *canvas_ops;
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+ uint8_t canvas_id_osd1;
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+
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struct drm_device *drm;
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struct drm_crtc *crtc;
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struct drm_fbdev_cma *fbdev;
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diff --git a/drivers/gpu/drm/meson/meson_plane.c b/drivers/gpu/drm/meson/meson_plane.c
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index 12c80df..8745f92 100644
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--- a/drivers/gpu/drm/meson/meson_plane.c
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+++ b/drivers/gpu/drm/meson/meson_plane.c
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@@ -36,7 +36,6 @@
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#include "meson_plane.h"
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#include "meson_vpp.h"
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#include "meson_viu.h"
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-#include "meson_canvas.h"
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#include "meson_registers.h"
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struct meson_plane {
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@@ -105,7 +104,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
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OSD_BLK0_ENABLE;
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/* Set up BLK0 to point to the right canvas */
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- priv->viu.osd1_blk0_cfg[0] = ((MESON_CANVAS_ID_OSD1 << OSD_CANVAS_SEL) |
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+ priv->viu.osd1_blk0_cfg[0] = ((priv->canvas_id_osd1 << OSD_CANVAS_SEL) |
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OSD_ENDIANNESS_LE);
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/* On GXBB, Use the old non-HDR RGB2YUV converter */
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diff --git a/drivers/gpu/drm/meson/meson_viu.c b/drivers/gpu/drm/meson/meson_viu.c
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index 6bcfa52..5b48c4c 100644
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--- a/drivers/gpu/drm/meson/meson_viu.c
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+++ b/drivers/gpu/drm/meson/meson_viu.c
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@@ -25,7 +25,6 @@
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#include "meson_viu.h"
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#include "meson_vpp.h"
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#include "meson_venc.h"
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-#include "meson_canvas.h"
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#include "meson_registers.h"
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/**
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