build/patch/kernel/sunxi-next/board-orangepi-pc2-add-spi-flash.patch
Igor Pečovnik 1a12994e79
Moving sunxi-next to 4.17.y (#1049)
* [Early WIP] Update sunxi-next to kernel 4.17
* Switch Allwinner 32 and 64bit to U-boot 2018.05
* Adjust patched for 4.17.y / sunxi-next
- adjust both configurations
- removing FAT support from u-boot (breaks if you try to save)

Tested those boards:
Cubietruck: wlan fails http://ix.io/1fYS USB OK, HDMI yes
Bananapi R40: http://ix.io/1fZm USB OK, HDMI yes
Lime A64: USB no, HDMI no, wireless buggy, eMMC yes
Orangepi prime H5: OK http://ix.io/1fZJ DVFS no
Orangepi2e: DVFS OK, HDMI OK, net OK, wifi OK, eMMC ok,  http://ix.io/1fZT

* Kernel config update, enabling HDMI on CT+
* Trying to fix A64 HDMI but failed. Fixed M64 ethernet instead
* Update orangepioneplus.wip
* Update orangepioneplus.wip
* Fix H6 build process
* Add regulator bits for Orangepizero+, thanks to @5kft
* add H5 support for optional 1.3v regulator and 1.3GHz operation
This patch adds two optional overlays that can be used to:

1) enable the 1.1v/1.3v regulator on boards that provide the necessary compatible H/W support
2) modify the default CPU clock operating table to add new 1.2GHz and 1.3GHz clocks

Note that the generated regulator overlay will only support boards whose 1.1v/1.3v regulator
is controlled by GPIO PL6.
* updates for the NanoPi NEO Plus2
This change introduces a patch that provides two changes for the NanoPi NEO Plus2:
* Configure the "cpu0" to use the "vdd_cpux" regulator; this enables the ability to use higher CPU clocks
* Correct the configurations of the on-board power and status LEDs
* Adjust nightly building and few boards config cleanup
2018-07-17 15:53:30 +02:00

36 lines
1.2 KiB
Diff

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 2582b113..93af1282 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -271,6 +271,31 @@
};
};
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ };
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;