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0cdffb29b0
* Change DEV to EDGE * Renaming patches dev folder to edge * Move patches into subdir where they will be archived. * Relink patch directories properly
80 lines
1.7 KiB
Diff
80 lines
1.7 KiB
Diff
From 0a9aaba73fd285d0654bfba5ffdeffff15e8ed55 Mon Sep 17 00:00:00 2001
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From: JMCC <jmcc1@gmx.com>
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Date: Thu, 18 Feb 2021 18:36:07 +0100
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Subject: [PATCH] nanopct4-enable-dp
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Signed-off-by: JMCC <jmcc1@gmx.com>
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---
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.../dts/rockchip/rk3399-nanopi4-rev00.dts | 52 +++++++++++++++++++
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1 file changed, 52 insertions(+)
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-rev00.dts b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-rev00.dts
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index e0c98dc0..f57c23ba 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-rev00.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi4-rev00.dts
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@@ -22,6 +22,48 @@
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/ {
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model = "FriendlyElec NanoPC-T4";
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compatible = "friendlyelec,nanopc-t4", "rockchip,rk3399";
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+
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+ fiq_debugger: fiq-debugger {
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+ compatible = "rockchip,fiq-debugger";
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+ rockchip,serial-id = <2>;
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+ rockchip,signal-irq = <182>;
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+ rockchip,wake-irq = <0>;
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+ rockchip,irq-mode-enable = <1>; /* If enable uart uses irq instead of fiq */
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+ rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart2c_xfer>;
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+ };
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+
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+ xin32k: xin32k {
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+ compatible = "fixed-clock";
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+ clock-frequency = <32768>;
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+ clock-output-names = "xin32k";
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+ #clock-cells = <0>;
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+ };
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+
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+ cdn_dp: dp@fec00000 {
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+ status = "okay";
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+ };
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+
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+ edp: edp@ff970000 {
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+ status = "okay";
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+ /delete-node/ edp_hpd;
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+ };
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+
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+};
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+
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+&display_subsystem {
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+
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+ route {
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+ route_hdmi: route-hdmi {
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+ status = "okay";
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+ };
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+
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+ route_edp: route-edp {
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+ status = "okay";
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+ };
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+ };
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+
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};
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&mach {
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@@ -36,3 +78,13 @@
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num-lanes = <4>;
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max-link-speed = <2>;
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};
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+
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+
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+&edp {
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+ status = "okay";
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+};
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+
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+&cdn_dp {
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+ status = "okay";
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+};
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+
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--
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Created with Armbian build tools https://github.com/armbian/build
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