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90 lines
2.3 KiB
Diff
90 lines
2.3 KiB
Diff
diff --git a/arch/arm/dts/sun50i-h6.dtsi b/arch/arm/dts/sun50i-h6.dtsi
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index cfa5fff..c4c7f07 100644
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--- a/arch/arm/dts/sun50i-h6.dtsi
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+++ b/arch/arm/dts/sun50i-h6.dtsi
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@@ -92,6 +92,43 @@
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#size-cells = <1>;
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ranges;
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+ syscon: syscon@3000000 {
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+ compatible = "allwinner,sun50i-h6-system-control",
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+ "allwinner,sun50i-a64-system-control";
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+ reg = <0x03000000 0x1000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+
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+ sram_c: sram@28000 {
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+ compatible = "mmio-sram";
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+ reg = <0x00028000 0x1e000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0x00028000 0x1e000>;
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+
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+ de2_sram: sram-section@0 {
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+ compatible = "allwinner,sun50i-h6-sram-c",
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+ "allwinner,sun50i-a64-sram-c";
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+ reg = <0x0000 0x1e000>;
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+ };
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+ };
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+
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+ sram_c1: sram@1a00000 {
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+ compatible = "mmio-sram";
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+ reg = <0x01a00000 0x200000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0x01a00000 0x200000>;
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+
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+ ve_sram: sram-section@0 {
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+ compatible = "allwinner,sun50i-h6-sram-c1",
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+ "allwinner,sun4i-a10-sram-c1";
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+ reg = <0x000000 0x200000>;
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+ };
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+ };
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+ };
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+
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ccu: clock@3001000 {
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compatible = "allwinner,sun50i-h6-ccu";
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reg = <0x03001000 0x1000>;
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@@ -101,6 +138,26 @@
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#reset-cells = <1>;
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};
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+ emac: ethernet@5020000 {
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+ compatible = "allwinner,sun50i-h6-emac",
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+ "allwinner,sun50i-a64-emac";
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+ syscon = <&syscon>;
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+ reg = <0x05020000 0x10000>;
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+ interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-names = "macirq";
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+ resets = <&ccu RST_BUS_EMAC>;
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+ reset-names = "stmmaceth";
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+ clocks = <&ccu CLK_BUS_EMAC>;
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+ clock-names = "stmmaceth";
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+ status = "disabled";
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+
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+ mdio: mdio {
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+ compatible = "snps,dwmac-mdio";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ };
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+ };
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+
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gic: interrupt-controller@3021000 {
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compatible = "arm,gic-400";
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reg = <0x03021000 0x1000>,
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@@ -126,6 +183,14 @@
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interrupt-controller;
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#interrupt-cells = <3>;
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+ ext_rgmii_pins: rgmii_pins {
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+ pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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+ "PD5", "PD7", "PD8", "PD9", "PD10",
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+ "PD11", "PD12", "PD13", "PD19", "PD20";
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+ function = "emac";
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+ drive-strength = <40>;
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+ };
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+
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mmc0_pins: mmc0-pins {
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pins = "PF0", "PF1", "PF2", "PF3",
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"PF4", "PF5";
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