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This merge request contains various files which add support for xt-q8l-v10 boards (TVBox) equipped with Rockchip RK3288 SoC, AP6330 WiSoC (BCM4330 WiFi + Bluetooth), 2 GB DRAM (LPDDR2 or DDR3), 8 Gb eMMC, Gigabit Ethernet, 3 USB (1 OTG), 1 microSD slot, SPDIF optical output, 1 HDMI. Kernel patches: This thouches all three linux-rockchip-* kernelconfigs, just adds brcmfmac and brcmutil modules and remote controller support. default flavor activates rockchip own remote controller driver, next and dev use the mainline GPIO CIR driver (dev has lirc userland support activated too). About the remote controller, an additional kernel module is added to the existing keymaps which is activated via device tree. About possibly clashing patches assert-phy-reset-when-waking-up-in-rk3288-platform.patch should be checked against other rk3288 boards because it addresses an errata in rk3288 which causes the USB Host ports to stop responding when exiting from autosleep. On my device if I connect the first USB device when the system is already running, the USB Host gets stuck without this patch. Probably to work correctly on other platforms the device tree should include the proper reset lines of the USB PHYs (for reference, check patch/kernel/rockchip-dev/xt-q8l-v10-add-device-tree.patch starting from line 869). Patch 1-2-regulator-act8865-add-restart-handler-for-act8846.patch adds a restart handler which allows reboot using SIPC bit on act8846 power regulator. Possibly MiQi board is affected (is reboot working there?), others (tinkerboard) should not care. Patch brcmfmac-add-ap6330-firmware.patch adds firmware file names for ap6330 , should be harmless in other cases. Patch 0010-GPU-Mali-Midgard-remove-rcu_read_lock-references.patch is from Miouyouyou. It should be harmless, it was suggested by him to do some tests with devfreq Other patches just add the proper device trees, Kconfig and bits for supporting the board as a regular kernel supported board and should not interfere with anything else U-Boot patches: All the patches for u-boot are per-board, so nothing is added which may interfere with other existing boards here. They include the device tree and u-boot config and also a couple of patches to support the silergy power regulators driving current to CPU and GPU * Initial commit to provide kernel and u-boot configuration and device trees for xt-q8-v10 as patches Modification to rockchip config to add initialization bits for xt-q8-v10 * Committing correct path for rk3288_ddr_400Mhz... rockchip blob, moved assembling into another section to produce immediately an u-boot working binary * Enabled broadcom fmac driver in rockchip-next config * Changed name definition of rk3288-xt-q8-v10 board to "TVBox" Added bits to include support AP6330 and binary firmwares into the final image * Fixed device tree file name in related patch, added patching of Makefile to produce the device tree binary accordingly * Fixed xt-q8-v10 device tree patch Added brcmfmac driver to rockchip dev and default kernel configs * Syncing with upstream * Splitted add-xt-q8... kernel patches into two separate patches * Fixed bad extension while adding dtb in makefile for rockchip-default configuration Updated device tree patches for all rockchip confs * Enable mmc0 and usb in u-boot config Fixed again makefile patch for kernel next * Adding patches to reset the USB phy when kernel requires a reset, fixes autosuspend issue * Changed xt-q8-v10 to proper xt-q8l-v10 in every string and every filename Added power hold to u-boot, so now the device will boot and stay turned on without the need for the OTG cable anymore * Changed names from 'Q8' to proper 'XT-Q8L-V10' in device tree patch files * Legacy kernel device tree: Fixed bluetooth gpio pin clashing Fixed HDMI gpio pin clashing Added support for PWM-based IR-Receiver, added driver in kernel default config too Various other fixes to avoid some complaints from the kernel * Added booting bluetooth systemd service for AP6330 (xt-q8l-v10) that loads patchram and invokes hciattach Minor fixes to -next and -dev device trees for xt-q8l-v10 * Disabled OTG USB port in u-boot due to long timeout during initialization Fixed warning during u-boot dts compilation Added emmc as second boot device in dts * Adding myself to licensing * Committing modifications to device trees * Fixed dmac_bus_s explicitly set to unused dmac, restored right dmac in xt-q8l-v10 dts only Change PLL_CPLL frequency in device tree to 408 Mhz to avoid fractional divisor warnings * Added proper xt-q8l-v10_rk3288 configuration to u-boot, now appearing in config menu and correctly selectable as a real target Fixed typo in device tree from rockchip * Fixed missing semicolon in device tree for default configuration Fixed patch files for u-boot appending themselves to files on each compilation * Added bits to enable power to USB ports in u-boot, thus enabling booting from USB devices (only USB host port for now) * Changed u-boot binary creation using the rockchip SPL properly * Added boot order for xt-q8l-v10: sdcard, usb0, eMMC, network * Added bionic:next in beta config for xt-q8l-v10 board * Changed some minor bits in xt-q8l-v10 device tree files, added missing bits to dev flavour Added patches to introduce fairchild fan53555/silergy82x regulators to u-boot and enabled in xt-q8l-v10 device tree * Updated u-boot to version v2018.03 for xt-q8l-v10. Other rk3288 boards will gain v2018.05 from main armbian fork Removed pre-reloc labels in u-boot device tree because they are not necessary since we don't use u-boot SPL for xt-q8l-v10 Removed vmmc-supply and vqmmc-supply in u-boot device tree to avoid hang on boot * Tidied up a bit device trees, in particular some modifications are made to power regulator properties comparing them against the original q8l device tree Removed unnecessary dummy regulator, removed unnecessary capacities to embedded eMMC Disabled unused USB host Removed vmmc-supply and vqmmc-supply from emmc section because it causes hang in u-boot v2018.03 and newer * Restored previous regulator in u-boot dts removed assert phy reset USB patch from rockchip-dev because of some upstream incompatible changes * Added patch to enable IRQ for Midgard drivers which caused massive slowdown on dev kernel Changed u-boot if-code for xt-q8l-v10 in rockchip.conf Removed references to rk3288-linux.dtsi in xt-q8l-v10 device tree for default kernel * Committing effective removal of USB reset assert for dev kernel Committing changes to u-boot device tree * Added patch to disable USB power down for rockchip devices broken on latest kernel * Removed usb dwc2 patch to reinject it from specific branch * Reverting some voltage changes for xt-q8l-v10 device in rockchip-dev * Reverting some voltage changes for xt-q8l-v10 in u-boot section * Added patch to make USB ports working again on rockchip devices with mainline kernel >= 4.18 * Changed the 0 into false * Moved xt-q8l-v10 u-boot patches into board_xt-q8l-v10 directory * Changed some minor things in rockchip-dev dts for xt-q8l-v10, added mali midgard driver to dev kernel config * Added devfreq support for Mali in rockchip-next flavour * Remove manually applied patch (0007-drivers-drm...) because it has been added to armbian main repo * Removed duplicate patch which has added to main armbian repository * Tidied up regulators for default/next/dev rockchip flavours for xt-q8l-v10, disabling those regulators which are not tied to anything Enabled voltage regulator to make SPDIF connector work (thus not tested because I have no DAC) Changed rockchip-dev and rockchip-next config files to enable gpio-ir-receiver module to enable bundled remote IR controller, including kernel patch for keymap * Enabled back regulator REG7 to allow propert bluetooth functionaly * Minor changes to u-boot device tree for xt-q8l-v10 Added patch to set act8846 SIPC to correctly reboot the device (thus require some power-hold at reboot to make reboot fully working) * Fixed u-boot device tree * Added configuration bits to support TPL in u-boot for xt-q8l-v10 (TPL is thrown away though) to allow faster reboot times and achieve a working reset feature activating power hold gpio pin as soon as possible. gpio pin is hardwired into spl_board_init() u-boot code because it is not possible to let it work via device tree Fixed OTG USB port in u-boot, allowing devices detection and booting Added proper vbus-supply properties for USB controllers in u-boot dts, so u-boot activates USB vbus itself * Fixed dts makefile patching for next and dev rockchip kernel * Fixed fdt_file renamed to fdtfile in armbianEnv.txt * Changed xt-q8l-v10 board config as per recomendations * Moved xt-q8l-v10 configuration to CSC Restored linux-rockchip-* configurations, enabled brcmfmac driver, GPIO remote controller driver and lirc kernel compatibility interface Polished a bit rockchip.conf * Add patch to brcmfmac driver to search for ap6330 firmware Removed copy-work from rockchip.conf about ap6330 firmware for xt-q8l-v10 and tidied up Avoid using brcm_patchram_plus in ap6330-bluetooth-service putting proper firmware file in /etc/firmware for hciattach do firmware uploading itself * Fixed bcm4330 bluetooth firmware linking for hciattach used by ap6330-bluetooth.service * Removed foreign test patches from xt-q8l-v10 u-boot directory
972 lines
22 KiB
Diff
972 lines
22 KiB
Diff
--- a/arch/arm/boot/dts/rk3288-xt-q8l-v10.dts 1970-01-01 01:00:00.000000000 +0100
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+++ b/arch/arm/boot/dts/rk3288-xt-q8l-v10.dts 2018-09-23 15:07:23.816787921 +0200
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@@ -0,0 +1,969 @@
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+/*
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+ * Copyright (c) 2014, 2015 FUKAUMI Naoki <naobsd@gmail.com>
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+ * 2018 Paolo Sabatino <paolo.sabatino@gm**l.com>
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This file is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This file is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+/dts-v1/;
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+
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+#include "rk3288.dtsi"
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+#include <dt-bindings/input/input.h>
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+
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+/ {
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+ model = "XT-Q8L-V10-RK3288";
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+ compatible = "generic,xt-q8l-v10-rk3288", "rockchip,rk3288";
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+
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+ memory {
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+ reg = <0x0 0x0 0x0 0x80000000>;
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+ device_type = "memory";
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+ };
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+
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+ cpu0_opp_table: opp_table {
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+ compatible = "operating-points-v2";
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+ opp-shared;
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+
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+ opp@600000000 {
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+ opp-hz = /bits/ 64 <600000000>;
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+ opp-microvolt = <900000>;
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+ };
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+ opp@816000000 {
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+ opp-hz = /bits/ 64 <816000000>;
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+ opp-microvolt = <1000000>;
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+ };
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+ opp@1008000000 {
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+ opp-hz = /bits/ 64 <1008000000>;
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+ opp-microvolt = <1050000>;
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+ };
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+ opp@1200000000 {
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+ opp-hz = /bits/ 64 <1200000000>;
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+ opp-microvolt = <1100000>;
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+ };
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+ opp@1416000000 {
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+ opp-hz = /bits/ 64 <1416000000>;
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+ opp-microvolt = <1200000>;
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+ };
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+ opp@1512000000 {
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+ opp-hz = /bits/ 64 <1512000000>;
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+ opp-microvolt = <1250000>;
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+ };
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+ opp@1608000000 {
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+ opp-hz = /bits/ 64 <1608000000>;
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+ opp-microvolt = <1300000>;
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+ };
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+ /*
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+ opp@1704000000 {
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+ opp-hz = /bits/ 64 <1704000000>;
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+ opp-microvolt = <1350000>;
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+ };
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+ opp@1800000000 {
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+ opp-hz = /bits/ 64 <1800000000>;
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+ opp-microvolt = <1400000>;
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+ };
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+ */
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+ };
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+
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+ /*
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+ * Peripheral from original q8 device tree, currently no references
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+ * for drivers in linux kernel.
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+ rockchip-hsadc@ff080000 {
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+ compatible = "rockchip-hsadc";
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+ reg = <0xff080000 0x4000>;
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+ interrupts = <0x0 0x1f 0x4>;
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+ #address-cells = <0x1>;
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+ #size-cells = <0x0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <0x9a>;
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+ clocks = <0x79 0x7 0x8 0x39>;
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+ clock-names = "hclk_hsadc", "clk_hsadc_out", "clk_hsadc_ext";
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+ dmas = <0x9b 0x0>;
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+ dma-names = "data";
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+ status = "disabled";
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+ };
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+ */
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+
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+ ext_gmac: external-gmac-clock {
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+ compatible = "fixed-clock";
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+ #clock-cells = <0>;
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+ clock-frequency = <125000000>;
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+ clock-output-names = "ext_gmac";
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+ };
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+
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+ /*
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+ * Handle the IR receiver using the gpio-ir-receiver kernel module.
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+ * This works flawlessy, the original xt-q8l-v10 remote uses a NEC
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+ * protocol and the keymap rc-xt-q8l-v10 has to be compiled in the
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+ * kernel for the remote to work as an input device
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+ */
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+ ir: ir-receiver {
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+ compatible = "gpio-ir-receiver";
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+ gpios = <&gpio7 RK_PA0 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ir_int>;
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+ linux,rc-map-name = "rc-xt-q8l-v10";
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+ wakeup-source;
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+ };
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+
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+ keys: gpio-keys {
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+ compatible = "gpio-keys";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwr_key>;
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+
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+ button@0 {
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+ gpio-key,wakeup = <1>;
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+ gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
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+ label = "GPIO Power";
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+ linux,code = <KEY_POWER>;
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+ wakeup-source;
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+ debounce-interval = <100>;
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+ };
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+
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ power {
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+ /*
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+ Power led is active high, but we set it here active low
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+ so while there is mass storage access it turns red and
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+ when it is idle is blue
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+ */
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+ gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
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+ label = "power";
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+ linux,default-trigger = "mmc0";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&power_led>;
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+ };
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+
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+ };
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+
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+ vcc_sys: vsys-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ regulator-boot-on;
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+ };
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+
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+ vcc_sd: sdmmc-regulator {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc_pwr>;
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+ regulator-name = "vcc_sd";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <100000>;
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+ vin-supply = <&vcc_io>;
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+ };
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+
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+ vcc_flash: flash-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_flash";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_io>;
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+ };
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+
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+ vcc_host_5v: usb-host-regulator {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&host_vbus_drv>;
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+ regulator-name = "vcc_host_5v";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ regulator-always-on;
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+ enable-active-high;
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+// startup-delay-us = <1000>;
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+
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+ vcc_otg_5v: usb-otg-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&otg_vbus_drv>;
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+ regulator-name = "vcc_otg_5v";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+// startup-delay-us = <1000>;
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+ regulator-always-on;
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+ vin-supply = <&vcc_sys>;
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+ };
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+
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+ /*
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+ * Required power sequence to properly enable the wireless/bluetooth
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+ * module connected to sdio0
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+ */
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+ sdio0_pwrseq: sdio0_pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_enable_h>, <&bt_enable_h>;
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+ reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>, <&gpio4 29 GPIO_ACTIVE_LOW>;
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+ post-power-on-delay-ms = <100>;
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+ };
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+
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+ /*
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+ * Sound taken from tinkerboard device tree, adapted to q8.
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+ */
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+ soundcard-hdmi {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "DW-I2S-HDMI";
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+ simple-audio-card,mclk-fs = <512>;
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&hdmi>;
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+ };
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s>;
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+ };
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+ };
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+
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+ soundcard-spdif {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,name = "SPDIF";
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+ simple-audio-card,dai-link@1 {
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+
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+ cpu {
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+ sound-dai = <&spdif>;
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+ };
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+
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+ codec {
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+ sound-dai = <&spdif_out>;
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+ };
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+
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+ };
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+ };
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+
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+ spdif_out: spdif-out {
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+ compatible = "linux,spdif-dit";
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+ #sound-dai-cells = <0>;
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+ };
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+
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+};
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+
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+
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+&io_domains {
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+ status = "okay";
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+
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+ audio-supply = <&vcca_33>;
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+ bb-supply = <&vcc_io>;
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+ dvp-supply = <&vcc_18>;
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+ flash0-supply = <&vcc_flash>;
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+ flash1-supply = <&vcc_lan>;
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+ gpio30-supply = <&vcc_io>;
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+ gpio1830-supply = <&vcc_io>;
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+ lcdc-supply = <&vcc_io>;
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+ sdcard-supply = <&vccio_sd>;
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+ wifi-supply = <&vcc_18>;
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+};
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+
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+&cpu0 {
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+ cpu0-supply = <&vdd_cpu>;
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+ operating-points-v2 = <&cpu0_opp_table>;
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+ /delete-node/operating-points;
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+};
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+
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+&gmac {
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+ assigned-clocks = <&cru SCLK_MAC>;
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+ assigned-clock-parents = <&ext_gmac>;
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+ clock_in_out = "input";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&rgmii_pins>, <&phy_rst>, <&phy_pmeb>, <&phy_int>;
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+ phy-supply = <&vcc_lan>;
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+ phy-mode = "rgmii";
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 10000 1000000>;
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+ snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_LOW>;
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+ tx_delay = <0x30>;
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+ rx_delay = <0x10>;
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+ status = "ok";
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+};
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+
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|
+&hdmi {
|
|
+ ddc-i2c-bus = <&i2c5>;
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&gpu {
|
|
+ mali-supply = <&vdd_gpu>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c0 {
|
|
+ clock-frequency = <400000>;
|
|
+ status = "okay";
|
|
+
|
|
+ vdd_cpu: syr827@40 {
|
|
+ compatible = "silergy,syr827";
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ reg = <0x40>;
|
|
+ regulator-name = "vdd_cpu";
|
|
+ regulator-min-microvolt = <850000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <8000>;
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ vin-supply = <&vcc_sys>;
|
|
+ };
|
|
+
|
|
+ vdd_gpu: syr828@41 {
|
|
+ compatible = "silergy,syr828";
|
|
+ fcs,suspend-voltage-selector = <1>;
|
|
+ reg = <0x41>;
|
|
+ regulator-name = "vdd_gpu";
|
|
+ regulator-min-microvolt = <850000>;
|
|
+ regulator-max-microvolt = <1350000>;
|
|
+ regulator-ramp-delay = <8000>;
|
|
+ regulator-always-on;
|
|
+ vin-supply = <&vcc_sys>;
|
|
+ };
|
|
+
|
|
+ hym8563: hym8563@51 {
|
|
+ compatible = "haoyu,hym8563";
|
|
+ reg = <0x51>;
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <32768>;
|
|
+ clock-output-names = "xin32k";
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rtc_int>;
|
|
+ };
|
|
+
|
|
+ act8846: act8846@5a {
|
|
+ compatible = "active-semi,act8846";
|
|
+ reg = <0x5a>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pmic_vsel>;
|
|
+ system-power-controller;
|
|
+
|
|
+ vp1-supply = <&vcc_sys>;
|
|
+ vp2-supply = <&vcc_sys>;
|
|
+ vp3-supply = <&vcc_sys>;
|
|
+ vp4-supply = <&vcc_sys>;
|
|
+ inl1-supply = <&vcc_sys>;
|
|
+ inl2-supply = <&vcc_sys>;
|
|
+ inl3-supply = <&vcc_20>;
|
|
+
|
|
+ regulators {
|
|
+
|
|
+ /*
|
|
+ * Regulator controlling DDR memory - always on
|
|
+ */
|
|
+ vcc_ddr: REG1 {
|
|
+ regulator-name = "vcc_ddr";
|
|
+ regulator-min-microvolt = <1200000>;
|
|
+ regulator-max-microvolt = <1200000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * Regulator controlling various IO functions of the rk3288.
|
|
+ * Always on
|
|
+ */
|
|
+ vcc_io: REG2 {
|
|
+ regulator-name = "vcc_io";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * Regulator controlling various board logic.
|
|
+ * Always on.
|
|
+ * rk3288 electrical datasheet says it should have variable
|
|
+ * voltage depending upon dvfs
|
|
+ */
|
|
+ vdd_log: REG3 {
|
|
+ regulator-name = "vdd_log";
|
|
+ regulator-min-microvolt = <1100000>;
|
|
+ regulator-max-microvolt = <1100000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * No reference for this on electrical datasheet. Maybe this
|
|
+ * is vcc_18? Maybe this is vcc18_flash on electrical datasheet.
|
|
+ * So far we disable it.
|
|
+ */
|
|
+ vcc_20: REG4 {
|
|
+ regulator-name = "vcc_20";
|
|
+ regulator-min-microvolt = <2000000>;
|
|
+ regulator-max-microvolt = <2000000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * This regulator controls SDIO. Electrical datasheet says
|
|
+ * this regulator can be operated between 1.8 and 3.3 volts
|
|
+ */
|
|
+ vccio_sd: REG5 {
|
|
+ regulator-name = "vccio_sd";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * Controlling HDMI and LCD controller on rk3288. 1.0 volts
|
|
+ * by reference
|
|
+ */
|
|
+ vdd10_lcd: REG6 {
|
|
+ regulator-name = "vdd10_lcd";
|
|
+ regulator-min-microvolt = <1000000>;
|
|
+ regulator-max-microvolt = <1000000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * From the rk3288 electrical datasheet, this regulator powers
|
|
+ * the rk1000 chip, which is absent in our device, but it
|
|
+ * is also supplying bluetooth, so we enable it.
|
|
+ */
|
|
+ vcca_18: REG7 {
|
|
+ regulator-name = "vcca_18";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * This regulator controls, among other things, the SPDIF
|
|
+ * interface, so we enable it
|
|
+ */
|
|
+ vcca_33: REG8 {
|
|
+ regulator-name = "vcca_33";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-always-on; // Turn this on to get SPDIF!
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * LAN regulator
|
|
+ */
|
|
+ vcc_lan: REG9 {
|
|
+ regulator-name = "vcc_lan";
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * Regulator controlling PMU, USB PHY and rk3288 PLLs.
|
|
+ * 1.0 volts by reference
|
|
+ */
|
|
+ vdd_10: REG10 {
|
|
+ regulator-name = "vdd_10";
|
|
+ regulator-min-microvolt = <1000000>;
|
|
+ regulator-max-microvolt = <1000000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * Regulator controlling Wifi over SDIO, SARADC and USB PHY.
|
|
+ * Better turn this on
|
|
+ */
|
|
+ vccio_wl: vcc_18: REG11 {
|
|
+ regulator-name = "vcc_18";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+
|
|
+ /*
|
|
+ * Not clear: apparently this controls HDMI and LCD controller
|
|
+ * on rk3368 devices.
|
|
+ * 1.8 volts by reference
|
|
+ */
|
|
+ vcc18_lcd: REG12 {
|
|
+ regulator-name = "vcc18_lcd";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+ regulator-always-on;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2c4 {
|
|
+
|
|
+ /*
|
|
+ * Here should go the RK1000 audio codec parts, but seems that
|
|
+ * there is no driver in linux kernel at the moment, so we can't
|
|
+ * describe it.
|
|
+ * Datasheet is available here:
|
|
+ * http://dl.radxa.com/rock/docs/hw/ds/RK1000-S%20DATASHEET%20V14.pdf
|
|
+ */
|
|
+ status = "okay";
|
|
+
|
|
+};
|
|
+
|
|
+&i2c5 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+
|
|
+ /*
|
|
+ These two lines here, these must be commented out! Otherwise for some reason the kernel
|
|
+ does not see the boot device anymore and will stay stuck in initramfs!
|
|
+ On the contrary, these are required by u-boot to keep the power holding so the device does not
|
|
+ automatically turns off after a small timeout
|
|
+ */
|
|
+ /*pinctrl-names = "default";*/
|
|
+ /*pinctrl-0 = <&pwr_hold>;*/
|
|
+
|
|
+ pcfg_output_high: pcfg-output-high {
|
|
+ output-high;
|
|
+ };
|
|
+
|
|
+ pcfg_output_low: pcfg-output-low {
|
|
+ output-low;
|
|
+ };
|
|
+
|
|
+ pcfg_wl: pcfg-wl {
|
|
+ bias-pull-up;
|
|
+ drive-strength = <8>;
|
|
+ };
|
|
+
|
|
+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
|
|
+ bias-pull-up;
|
|
+ drive-strength = <8>;
|
|
+ };
|
|
+
|
|
+ pcfg_pull_none_8ma: pcfg-pull-none-8ma {
|
|
+ bias-disable;
|
|
+ drive-strength = <8>;
|
|
+ };
|
|
+
|
|
+ pcfg_wl_clk: pcfg-wl-clk {
|
|
+ bias-disable;
|
|
+ drive-strength = <12>;
|
|
+ };
|
|
+
|
|
+ pcfg_wl_int: pcfg-wl-int {
|
|
+ bias-pull-up;
|
|
+ };
|
|
+
|
|
+ act8846 {
|
|
+
|
|
+ /*
|
|
+ * Original q8 device tree says:
|
|
+ * - gpio0 11 HIGH -> power hold
|
|
+ * - gpio7 1 LOW -> possibly pmic-vsel, we don't care
|
|
+ */
|
|
+ pmic_vsel: pmic-vsel {
|
|
+ rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
|
|
+ };
|
|
+
|
|
+ pwr_hold: pwr-hold {
|
|
+ rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ gmac {
|
|
+ phy_int: phy-int {
|
|
+ rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ phy_pmeb: phy-pmeb {
|
|
+ rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+
|
|
+ phy_rst: phy-rst {
|
|
+ rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ hym8563 {
|
|
+ rtc_int: rtc-int {
|
|
+ rockchip,pins = <0 4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ keys {
|
|
+ pwr_key: pwr-key {
|
|
+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ power_led: power-led {
|
|
+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ ir {
|
|
+ ir_int: ir-int {
|
|
+ rockchip,pins = <7 0 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdmmc {
|
|
+
|
|
+ /*
|
|
+ * Copied from firefly board definition to give more drive to
|
|
+ * the sdmmc pins. The Q8 seems to be quite able to drive
|
|
+ * ultra high speed uSD cards, so we give a bit more energy
|
|
+ * to the gpio pins
|
|
+ */
|
|
+ sdmmc_bus4: sdmmc-bus4 {
|
|
+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
|
+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
|
+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>,
|
|
+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc_clk: sdmmc-clk {
|
|
+ rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_8ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc_cmd: sdmmc-cmd {
|
|
+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>;
|
|
+ };
|
|
+
|
|
+ sdmmc_pwr: sdmmc-pwr {
|
|
+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ usb_host1 {
|
|
+ host_vbus_drv: host-vbus-drv {
|
|
+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+ usb_otg {
|
|
+ otg_vbus_drv: otg-vbus-drv {
|
|
+ rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ sdio0 {
|
|
+ wifi_enable_h: wifienable-h {
|
|
+ rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_output_high>;
|
|
+ };
|
|
+
|
|
+ bt_enable_h: bt-enable-h {
|
|
+ rockchip,pins = <4 27 RK_FUNC_GPIO &pcfg_output_high>;
|
|
+ };
|
|
+
|
|
+ };
|
|
+
|
|
+
|
|
+ wireless-bluetooth {
|
|
+ uart0_gpios: uart0-gpios {
|
|
+ rockchip,pins = <4 19 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+};
|
|
+
|
|
+&saradc {
|
|
+ vref-supply = <&vcc_18>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&emmc {
|
|
+
|
|
+ /*
|
|
+ * eMMC seems to be 52Mhz device on q8 devices, so set it here
|
|
+ * vmmc-supply and vqmmc-supply are removed because they hang
|
|
+ * u-boot >= v2018.03
|
|
+ * From the original q8l firmware and eMMC datasheet it also should
|
|
+ * support DDR highspeed mode, but using mmc-ddr-3_3v or mmc-ddr-1_8v
|
|
+ * properties are not working
|
|
+ */
|
|
+ clock-frequency = <50000000>;
|
|
+
|
|
+ broken-cd;
|
|
+ bus-width = <8>;
|
|
+ cap-mmc-highspeed;
|
|
+ disable-wp;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_pwr>, <&emmc_bus8>;
|
|
+
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc {
|
|
+ supports-sd;
|
|
+
|
|
+ bus-width = <4>;
|
|
+ cap-mmc-highspeed;
|
|
+ cap-sd-highspeed;
|
|
+ card-detect-delay = <200>;
|
|
+ disable-wp;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
|
|
+ vmmc-supply = <&vcc_sd>;
|
|
+ vqmmc-supply = <&vccio_sd>;
|
|
+ sd-uhs-sdr12;
|
|
+ sd-uhs-sdr25;
|
|
+ sd-uhs-sdr50;
|
|
+ sd-uhs-sdr104;
|
|
+ sd-uhs-ddr50;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdio0 {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ bus-width = <4>;
|
|
+ mmc-pwrseq = <&sdio0_pwrseq>;
|
|
+
|
|
+ vmmc-supply = <&vcc_io>;
|
|
+ vqmmc-supply = <&vcc_18>; // This must be the same as in io_domains,
|
|
+ // otherwise the mmc1 device won't be detected properly
|
|
+
|
|
+// clock-frequency = <50000000>;
|
|
+// max-frequency = <50000000>;
|
|
+
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdio0_bus4>, <&sdio0_cmd>, <&sdio0_clk>, <&sdio0_int>;
|
|
+
|
|
+ cap-sdio-irq;
|
|
+ no-mmc;
|
|
+ no-sd;
|
|
+ cap-sd-highspeed; // required, otherwise does not work!
|
|
+ supports-sdio;
|
|
+ non-removable;
|
|
+
|
|
+ keep-power-in-suspend;
|
|
+ disable-wp;
|
|
+
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ brcmf: bcrmf@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "brcm,bcm4329-fmac";
|
|
+ interrupt-parent = <&gpio4>;
|
|
+ interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
|
|
+ interrupt-names = "host-wake";
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
+ //sd-uhs-sdr104; // required to be disabled, otherwise the device get
|
|
+ // detected, but there is no communication
|
|
+
|
|
+};
|
|
+
|
|
+&spi0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&spi0_clk>, <&spi0_cs0>, <&spi0_tx>, <&spi0_rx>, <&spi0_cs1>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ rockchip,hw-tshut-mode = <0>;
|
|
+ rockchip,hw-tshut-polarity = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/*
|
|
+ * These dmas described here for uarts are present in original q8 board
|
|
+ * dts, so I replicate them here because documentation says that serial
|
|
+ * ports can have dmas.
|
|
+ * note:
|
|
+ * - uart0 is the serial port connected to the bluetooth module
|
|
+ * - uart2 is the onboard serial port
|
|
+ *
|
|
+ */
|
|
+&uart0 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart0_xfer>, <&uart0_cts>, <&uart0_rts>;
|
|
+ dmas = <&dmac_peri 1 &dmac_peri 2>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "okay";
|
|
+// uart-has-rtscts;
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ dmas = <&dmac_peri 3 &dmac_peri 4>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ dmas = <&dmac_bus_s 4 &dmac_bus_s 5>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart3 {
|
|
+ dmas = <&dmac_peri 7 &dmac_peri 8>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart4 {
|
|
+ dmas = <&dmac_peri 9 &dmac_peri 10>;
|
|
+ dma-names = "tx", "rx";
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+/*
|
|
+ * Describing resets for usb phy is important because otherwise the USB
|
|
+ * port gets stuck in case it goes into autosuspend: plugging any device
|
|
+ * when the port is autosuspended will actually kill the port itself and
|
|
+ * require a power cycle.
|
|
+ * This is required for the usbphy1 phy, nonetheless it is a good idea to
|
|
+ * specify the proper resources for all the phys though.
|
|
+ * The reference patch which works in conjuction with the reset lines:
|
|
+ * https://patchwork.kernel.org/patch/9469811/
|
|
+ */
|
|
+&usbphy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usbphy0 {
|
|
+ resets = <&cru SRST_USBOTG_PHY>;
|
|
+ reset-names = "phy-reset";
|
|
+ vbus-supply = <&vcc_otg_5v>;
|
|
+};
|
|
+
|
|
+&usbphy1 {
|
|
+ resets = <&cru SRST_USBHOST0_PHY>;
|
|
+ reset-names = "phy-reset";
|
|
+};
|
|
+
|
|
+&usbphy2 {
|
|
+ resets = <&cru SRST_USBHOST1_PHY>;
|
|
+ reset-names = "phy-reset";
|
|
+ vbus-supply = <&vcc_host_5v>;
|
|
+};
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ dr_mode = "host";
|
|
+ reg = <0x0 0xff500000 0x0 0x20000>;
|
|
+ status = "disable";
|
|
+};
|
|
+
|
|
+&usb_host1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_otg {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/*
|
|
+ * Enalbe VPU services and complete the relative IOMMU configurations
|
|
+ * including the clocks which are currently missing (kernel 4.17.2) from
|
|
+ * the current base definitions from rk3288.dtsi include file
|
|
+ */
|
|
+&vopb {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopl {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vpu_service {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hevc_service {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopb_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vopl_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vpu_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&hevc_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&wdt {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+/* q8 device tree specifies that pwm0 is enabled on the device and
|
|
+ * this is the device which listens for IR remote control
|
|
+ */
|
|
+/*
|
|
+&pwm0 {
|
|
+ status = "okay";
|
|
+};
|
|
+*/
|
|
+
|
|
+// i2s bus is present on q8 device, enable it
|
|
+&i2s {
|
|
+ #sound-dai-cells = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+// spdif is present on q8 device, enable it
|
|
+&spdif {
|
|
+ status = "okay";
|
|
+};
|