build/patch/kernel/sunxi-dev/sunxi-h5-add-gpio-regulator-overclock.patch
Igor Pečovnik a57ce78b37
Reverting sunxi/sunxi64 NEXT to 4.14. (#1087)
* Bump to 4.18, removing the obvious, fixing build problems, put some on waiting.

* Pin 4.18 to DEV, rollback 4.14 to NEXT, adjust configs, remove one deprecated patch from NEXT and add board-h3-address-some-stability-issues.patch

* Adjust few boards in development to new reality, removing it from NEXT for now

* Adjust few board configs

* Board config adjustement

* Adjust few boards configs

* Port NeoCore2 and Neo21.1 to 4.14.y

* Adjust board config

* Adjust board config
2018-08-21 10:41:10 +02:00

166 lines
5 KiB
Diff

diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 4c945d8..2833b86 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -12,6 +12,9 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-w1-gpio.dtbo \
sun50i-h5-analog-codec.dtbo \
sun50i-h5-cir.dtbo \
+ sun50i-h5-cpu-clock-1.3GHz.dtbo \
+ sun50i-h5-cpu-clock-1.4GHz.dtbo \
+ sun50i-h5-gpio-regulator-1.3v.dtbo \
sun50i-h5-i2c0.dtbo \
sun50i-h5-i2c1.dtbo \
sun50i-h5-i2c2.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts
new file mode 100644
index 0000000..4ab2633
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz.dts
@@ -0,0 +1,40 @@
+// DT overlay for operating points to 1.3GHz
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, replace the latter
+ // part of the OP table with the new frequencies...
+
+ // override the "1.056GHz" opp definition with the 1.104GHz clock definition
+ opp@1056000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ // override the "1.104GHz" opp definition with the 1.200GHz clock definition
+ opp@1104000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ // override the "1.152GHz" opp definition with the 1.296GHz clock definition
+ opp@1152000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.4GHz.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.4GHz.dts
new file mode 100644
index 0000000..6994432
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.4GHz.dts
@@ -0,0 +1,56 @@
+// DT overlay for operating points to 1.4GHz
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, replace the latter
+ // part of the OP table with the new frequencies...
+
+ // override the "960MHz" opp definition with the 1.008GHz clock definition
+ opp@960000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1200000 1200000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+
+ // override the "1.008GHz" opp definition with the 1.104GHz clock definition
+ opp@1008000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1240000 1240000 1400000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ // override the "1.056GHz" opp definition with the 1.200GHz clock definition
+ opp@1056000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1290000 1290000 1400000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+
+ // override the "1.104GHz" opp definition with the 1.296GHz clock definition
+ opp@1104000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1340000 1340000 1400000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ // override the "1.152GHz" opp definition with the 1.392GHz clock definition
+ opp@1152000000 {
+ opp-hz = /bits/ 64 <1392000000>;
+ opp-microvolt = <1400000 1400000 1400000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
new file mode 100644
index 0000000..8d2755c
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
@@ -0,0 +1,38 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+
+ fragment@0 {
+ target-path = "/";
+
+ __overlay__ {
+ reg_vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 0>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&cpu0>;
+
+ __overlay__ {
+ cpu-supply = <&reg_vdd_cpux>;
+ };
+ };
+};
+