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150ac0c2af
AR-1 - Adding support category for distributions AR-4 - Remove Allwinner legacy AR-5 - Drop Udoo family and move Udoo board into newly created imx6 family AR-9 - Rename sunxi-next to sunxi-legacy AR-10 - Rename sunxi-dev to sunxi-current AR-11 - Adding Radxa Rockpi S support AR-13 - Rename rockchip64-default to rockchip64-legacy AR-14 - Add rockchip64-current as mainline source AR-15 - Drop Rockchip 4.19.y NEXT, current become 5.3.y AR-16 - Rename RK3399 default to legacy AR-17 - Rename Odroid XU4 next and default to legacy 4.14.y, add DEV 5.4.y AR-18 - Add Odroid N2 current mainline AR-19 - Move Odroid C1 to meson family AR-20 - Rename mvebu64-default to mvebu64-legacy AR-21 - Rename mvebu-default to mvebu-legacy AR-22 - Rename mvebu-next to mvebu-current AR-23 - Drop meson64 default and next, current becomes former DEV 5.3.y AR-24 - Drop cubox family and move Cubox/Hummingboard boards under imx6 AR-26 - Adjust motd AR-27 - Enabling distribution release status AR-28 - Added new GCC compilers AR-29 - Implementing Ubuntu Eoan AR-30 - Add desktop packages per board or family AR-31 - Remove (Ubuntu/Debian) distribution name from image filename AR-32 - Move arch configs from configuration.sh to separate arm64 and armhf config files AR-33 - Revision numbers for beta builds changed to day_in_the_year AR-34 - Patches support linked patches AR-35 - Break meson64 family into gxbb and gxl AR-36 - Add Nanopineo2 Black AR-38 - Upgrade option from old branches to new one via armbian-config AR-41 - Show full timezone info AR-43 - Merge Odroid N2 to meson64 AR-44 - Enable FORCE_BOOTSCRIPT_UPDATE for all builds
63 lines
1.9 KiB
Diff
63 lines
1.9 KiB
Diff
From d9ad129ac7a3114568a323f44316d9d5bfd9a3f9 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Myl=C3=A8ne=20Josserand?= <mylene.josserand@bootlin.com>
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Date: Mon, 5 Mar 2018 11:04:31 +0100
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Subject: [PATCH 39/60] ARM: dts: sun8i: Add the H3/H5 CSI controller
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The H3 and H5 features the same CSI controller that was initially found on
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the A31.
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Add a DT node for it.
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Signed-off-by: Mylène Josserand <mylene.josserand@bootlin.com>
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Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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---
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arch/arm/boot/dts/sunxi-h3-h5.dtsi | 22 +++++++++++++++++++
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.../platform/sunxi/sun6i-csi/sun6i_csi.c | 1 +
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2 files changed, 23 insertions(+)
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diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
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index ff05c532792d..be75e7cfdc3a 100644
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--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
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+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
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@@ -550,6 +550,13 @@
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interrupt-controller;
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#interrupt-cells = <3>;
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+ csi_pins: csi {
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+ pins = "PE0", "PE1", "PE2", "PE3", "PE4",
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+ "PE5", "PE6", "PE7", "PE8", "PE9",
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+ "PE10", "PE11";
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+ function = "csi";
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+ };
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+
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emac_rgmii_pins: emac0 {
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pins = "PD0", "PD1", "PD2", "PD3", "PD4",
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"PD5", "PD7", "PD8", "PD9", "PD10",
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@@ -936,6 +943,21 @@
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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+ csi: camera@1cb0000 {
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+ compatible = "allwinner,sun8i-h3-csi",
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+ "allwinner,sun6i-a31-csi";
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+ reg = <0x01cb0000 0x1000>;
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+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_CSI>,
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+ <&ccu CLK_CSI_SCLK>,
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+ <&ccu CLK_DRAM_CSI>;
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+ clock-names = "bus", "mod", "ram";
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+ resets = <&ccu RST_BUS_CSI>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&csi_pins>;
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+ status = "disabled";
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+ };
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+
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rtc: rtc@1f00000 {
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compatible = "allwinner,sun6i-a31-rtc";
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reg = <0x01f00000 0x54>;
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--
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2.20.1
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