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MIPS: Loongson: Add Loongson-3A R3 basic support

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Loongson-3A R3 is very similar to Loongson-3A R2.

All Loongson-3 CPU family:

Code-name       Brand-name       PRId
Loongson-3A R1  Loongson-3A1000  0x6305
Loongson-3A R2  Loongson-3A2000  0x6308
Loongson-3A R3  Loongson-3A3000  0x6309
Loongson-3B R1  Loongson-3B1000  0x6306
Loongson-3B R2  Loongson-3B1500  0x6307

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@cavium.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16585/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Huacai Chen 2017-06-22 23:06:48 +08:00 • committed by Ralf Baechle
parent d3f616346d
commit 0a00024d7a
5 changed files with 24 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

17
drivers/platform/mips/cpu_hwmon.c
View file

@ -17,14 +17,23 @@
*/
int loongson3_cpu_temp(int cpu)
{
u32 reg;
u32 reg, prid_rev;
reg = LOONGSON_CHIPTEMP(cpu);
if ((read_c0_prid() & PRID_REV_MASK) == PRID_REV_LOONGSON3A_R1)
prid_rev = read_c0_prid() & PRID_REV_MASK;
switch (prid_rev) {
case PRID_REV_LOONGSON3A_R1:
reg = (reg >> 8) & 0xff;
else
break;
case PRID_REV_LOONGSON3A_R2:
case PRID_REV_LOONGSON3B_R1:
case PRID_REV_LOONGSON3B_R2:
reg = ((reg >> 8) & 0xff) - 100;
break;
case PRID_REV_LOONGSON3A_R3:
reg = (reg & 0xffff)*731/0x4000 - 273;
break;
}
return (int)reg * 1000;
}