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Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner: "This updated pull request does not contain the last few GIC related patches which were reported to cause a regression. There is a fix available, but I let it breed for a couple of days first. The irq departement provides: - new infrastructure to support non PCI based MSI interrupts - a couple of new irq chip drivers - the usual pile of fixlets and updates to irq chip drivers - preparatory changes for removal of the irq argument from interrupt flow handlers - preparatory changes to remove IRQF_VALID" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits) irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 irqchip: Add documentation for the bcm2836 interrupt controller irqchip/bcm2835: Add support for being used as a second level controller irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ PCI: xilinx: Fix typo in function name irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance irqchip/gic: Only allow the primary GIC to set the CPU map PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove unicore32/irq: Prepare puv3_gpio_handler for irq argument removal tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal m68k/irq: Prepare irq handlers for irq argument removal C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal blackfin: Prepare irq handlers for irq argument removal arc/irq: Prepare idu_cascade_isr for irq argument removal sparc/irq: Use access helper irq_data_get_affinity_mask() sparc/irq: Use helper irq_data_get_irq_handler_data() parisc/irq: Use access helper irq_data_get_affinity_mask() mn10300/irq: Use access helper irq_data_get_affinity_mask() irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal ...
This commit is contained in:
commit
17e6b00ac4
161 changed files with 2208 additions and 849 deletions
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@ -324,8 +324,10 @@ static inline irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
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* @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips
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* @irq_cpu_online: configure an interrupt source for a secondary CPU
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* @irq_cpu_offline: un-configure an interrupt source for a secondary CPU
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* @irq_suspend: function called from core code on suspend once per chip
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* @irq_resume: function called from core code on resume once per chip
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* @irq_suspend: function called from core code on suspend once per
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* chip, when one or more interrupts are installed
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* @irq_resume: function called from core code on resume once per chip,
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* when one ore more interrupts are installed
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* @irq_pm_shutdown: function called from core code on shutdown once per chip
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* @irq_calc_mask: Optional function to set irq_data.mask for special cases
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* @irq_print_chip: optional to print special chip info in show_interrupts
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@ -488,8 +490,7 @@ extern int irq_chip_set_type_parent(struct irq_data *data, unsigned int type);
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#endif
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/* Handling of unhandled and spurious interrupts: */
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extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
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irqreturn_t action_ret);
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extern void note_interrupt(struct irq_desc *desc, irqreturn_t action_ret);
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/* Enable/disable irq debugging output: */
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@ -640,7 +641,7 @@ static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
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return d ? d->msi_desc : NULL;
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}
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static inline struct msi_desc *irq_data_get_msi(struct irq_data *d)
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static inline struct msi_desc *irq_data_get_msi_desc(struct irq_data *d)
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{
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return d->msi_desc;
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}
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@ -762,6 +763,12 @@ struct irq_chip_type {
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* @reg_base: Register base address (virtual)
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* @reg_readl: Alternate I/O accessor (defaults to readl if NULL)
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* @reg_writel: Alternate I/O accessor (defaults to writel if NULL)
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* @suspend: Function called from core code on suspend once per
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* chip; can be useful instead of irq_chip::suspend to
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* handle chip details even when no interrupts are in use
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* @resume: Function called from core code on resume once per chip;
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* can be useful instead of irq_chip::suspend to handle
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* chip details even when no interrupts are in use
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* @irq_base: Interrupt base nr for this chip
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* @irq_cnt: Number of interrupts handled by this chip
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* @mask_cache: Cached mask register shared between all chip types
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@ -788,6 +795,8 @@ struct irq_chip_generic {
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void __iomem *reg_base;
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u32 (*reg_readl)(void __iomem *addr);
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void (*reg_writel)(u32 val, void __iomem *addr);
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void (*suspend)(struct irq_chip_generic *gc);
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void (*resume)(struct irq_chip_generic *gc);
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unsigned int irq_base;
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unsigned int irq_cnt;
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u32 mask_cache;
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