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percpu: align percpu readmostly subsection to cacheline
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com>
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19 changed files with 41 additions and 32 deletions
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@ -37,7 +37,7 @@ SECTIONS
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_einittext = .;
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INIT_DATA_SECTION(8)
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PERCPU(4096)
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PERCPU(L1_CACHE_BYTES, 4096)
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. = ALIGN(PAGE_SIZE);
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__init_end = .;
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