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drm/amd/display: When signal type of sink is none, use link type for stream

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Signed-off-by: Joshua Aberback <Joshua.Aberback@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Joshua Aberback 2017-01-09 14:43:08 -05:00 • committed by Alex Deucher
parent 4b5e7d6209
commit 2796eaee69
1 changed files with 11 additions and 10 deletions
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21
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
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@ -984,19 +984,20 @@ static void update_stream_signal(struct core_stream *stream)
{
const struct dc_sink *dc_sink = stream->public.sink;
stream->signal = dc_sink->sink_signal;
/* For asic supports dual link DVI, we should adjust signal type
* based on timing pixel clock. If pixel clock more than 165Mhz,
* signal is dual link, otherwise, single link.
*/
if (dc_sink->sink_signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
dc_sink->sink_signal == SIGNAL_TYPE_DVI_DUAL_LINK) {
if (stream->public.timing.pix_clk_khz >
TMDS_MAX_PIXEL_CLOCK_IN_KHZ)
if (dc_sink->sink_signal == SIGNAL_TYPE_NONE)
stream->signal = stream->sink->link->public.connector_signal;
else if (dc_sink->sink_signal == SIGNAL_TYPE_DVI_SINGLE_LINK ||
dc_sink->sink_signal == SIGNAL_TYPE_DVI_DUAL_LINK)
/* For asic supports dual link DVI, we should adjust signal type
* based on timing pixel clock. If pixel clock more than 165Mhz,
* signal is dual link, otherwise, single link.
*/
if (stream->public.timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ)
stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
else
stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
}
else
stream->signal = dc_sink->sink_signal;
}
bool resource_is_stream_unchanged(