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soundwire: bus: initialize bus clock base and scale registers

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The SoundWire 1.2 specification adds new registers to allow for
seamless clock changes while audio transfers are on-going. Program
them following the specification.

Note that dynamic clock changes are not supported for now, this only
adds the register initialization.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Reviewed-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Link: https://lore.kernel.org/r/20200608205436.2402-5-yung-chuan.liao@linux.intel.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Pierre-Louis Bossart 2020-06-09 04:54:36 +08:00 • committed by Vinod Koul
parent b5924268d6
commit 29d158f906
2 changed files with 117 additions and 0 deletions
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10
include/linux/soundwire/sdw_registers.h
View file

@ -109,8 +109,18 @@
#define SDW_SCP_KEEPEREN 0x4A
#define SDW_SCP_BANKDELAY 0x4B
#define SDW_SCP_COMMIT 0x4C
#define SDW_SCP_BUS_CLOCK_BASE 0x4D
#define SDW_SCP_BASE_CLOCK_FREQ GENMASK(2, 0)
#define SDW_SCP_BASE_CLOCK_UNKNOWN 0x0
#define SDW_SCP_BASE_CLOCK_19200000_HZ 0x1
#define SDW_SCP_BASE_CLOCK_24000000_HZ 0x2
#define SDW_SCP_BASE_CLOCK_24576000_HZ 0x3
#define SDW_SCP_BASE_CLOCK_22579200_HZ 0x4
#define SDW_SCP_BASE_CLOCK_32000000_HZ 0x5
#define SDW_SCP_BASE_CLOCK_RESERVED 0x6
#define SDW_SCP_BASE_CLOCK_IMP_DEF 0x7
/* 0x4E is not allocated in SoundWire specification 1.2 */
#define SDW_SCP_TESTMODE 0x4F
#define SDW_SCP_DEVID_0 0x50