mirror of
https://github.com/Fishwaldo/linux-bl808.git
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ARM fixes for 5.19:
- quieten the spectre-bhb prints - mark flattened device tree sections as shareable - remove some obsolete CPU domain code and help text - fix thumb unaligned access abort emulation - fix amba_device_add() refcount underflow - fix literal placement -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEuNNh8scc2k/wOAE+9OeQG+StrGQFAmLQD6IACgkQ9OeQG+St rGQI2Q//dYODqrByRkrS8uKpriP0CPZcEB3o1ZWioa/CpM+4aoPptqb9nOa2c0Xx LvBhL6k+fBJ8WCWlAJ50aIbcOwqSSzgf4EQMJo6Cc33vQi2alBLhL66ULF1rpQYm 2V7YRwtid/pRyP8LXaWdy/RbRvcXn5xF7cCvlMrOoZQ7nyloIT3nf0XydgoVn+xo lbfFdfPT18HQtUOiCSOGdI0pV1QEakMB4eJ9haZHak4l/XXBTRIg8PAxk1C8DfxZ aLfeI6VfCKLJ5q273QP9hK+Wu+L1xYK5siad1gm2AAfXW+OsNH7rR0VCMCSb6t+h bN9hvf0iNo/MtTH3PPbOK8kL48PSjARXAJp8MTcJLGAT5BozsvKkpCoT1C/7/uBv wPeTaAVMe69gNeK6TCkbnIL8C5p9errBsRRQ6YW7u4M1Z1DFFj5YdSmB+RSvKEr6 otvY68BPzZSZxzGXo1sFV+LLjZPUV6RvpOUY2d/aTTTyK8HHaHHLXIV1KyP+c9he HS+gxDciQe795wOQd5aRqEjGZbdh0aq6OjckAc36YeQwGnk0xXYG8irCPpTB58+q X7rme9U1zm3WUwbbA5ndrOjGvk6Jz6cjsAWWIX5l7i1EtcB8qzo/+/1KaWdfL5Bw 2MAH0djeFAJIh7Yq9R+JMrF0POUpdCp6c+xAyyTj8/1JFkm84XU= =g/12 -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm Pull ARM fixes from Russell King: - quieten the spectre-bhb prints - mark flattened device tree sections as shareable - remove some obsolete CPU domain code and help text - fix thumb unaligned access abort emulation - fix amba_device_add() refcount underflow - fix literal placement * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9208/1: entry: add .ltorg directive to keep literals in range ARM: 9207/1: amba: fix refcount underflow if amba_device_add() fails ARM: 9214/1: alignment: advance IT state after emulating Thumb instruction ARM: 9213/1: Print message about disabled Spectre workarounds only once ARM: 9212/1: domain: Modify Kconfig help text ARM: 9211/1: domain: drop modify_domain() ARM: 9210/1: Mark the FDT_FIXED sections as shareable ARM: 9209/1: Spectre-BHB: avoid pr_info() every time a CPU comes out of idle
This commit is contained in:
commit
2eb5866cac
10 changed files with 57 additions and 51 deletions
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@ -112,19 +112,6 @@ static __always_inline void set_domain(unsigned int val)
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}
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#endif
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#ifdef CONFIG_CPU_USE_DOMAINS
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#define modify_domain(dom,type) \
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do { \
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unsigned int domain = get_domain(); \
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domain &= ~domain_mask(dom); \
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domain = domain | domain_val(dom, type); \
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set_domain(domain); \
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} while (0)
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#else
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static inline void modify_domain(unsigned dom, unsigned type) { }
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#endif
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/*
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* Generate the T (user) versions of the LDR/STR and related
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* instructions (inline assembly)
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@ -27,6 +27,7 @@ enum {
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MT_HIGH_VECTORS,
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MT_MEMORY_RWX,
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MT_MEMORY_RW,
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MT_MEMORY_RO,
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MT_ROM,
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MT_MEMORY_RWX_NONCACHED,
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MT_MEMORY_RW_DTCM,
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@ -163,5 +163,31 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
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((current_stack_pointer | (THREAD_SIZE - 1)) - 7) - 1; \
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})
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/*
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* Update ITSTATE after normal execution of an IT block instruction.
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*
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* The 8 IT state bits are split into two parts in CPSR:
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* ITSTATE<1:0> are in CPSR<26:25>
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* ITSTATE<7:2> are in CPSR<15:10>
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*/
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static inline unsigned long it_advance(unsigned long cpsr)
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{
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if ((cpsr & 0x06000400) == 0) {
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/* ITSTATE<2:0> == 0 means end of IT block, so clear IT state */
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cpsr &= ~PSR_IT_MASK;
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} else {
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/* We need to shift left ITSTATE<4:0> */
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const unsigned long mask = 0x06001c00; /* Mask ITSTATE<4:0> */
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unsigned long it = cpsr & mask;
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it <<= 1;
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it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */
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it &= mask;
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cpsr &= ~mask;
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cpsr |= it;
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}
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return cpsr;
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}
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#endif /* __ASSEMBLY__ */
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#endif
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@ -302,6 +302,7 @@ local_restart:
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b ret_fast_syscall
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#endif
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ENDPROC(vector_swi)
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.ltorg
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/*
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* This is the really slow path. We're going to be doing
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@ -631,7 +631,11 @@ config CPU_USE_DOMAINS
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bool
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help
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This option enables or disables the use of domain switching
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via the set_fs() function.
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using the DACR (domain access control register) to protect memory
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domains from each other. In Linux we use three domains: kernel, user
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and IO. The domains are used to protect userspace from kernelspace
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and to handle IO-space as a special type of memory by assigning
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manager or client roles to running code (such as a process).
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config CPU_V7M_NUM_IRQ
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int "Number of external interrupts connected to the NVIC"
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@ -935,6 +935,9 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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if (type == TYPE_LDST)
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do_alignment_finish_ldst(addr, instr, regs, offset);
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if (thumb_mode(regs))
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regs->ARM_cpsr = it_advance(regs->ARM_cpsr);
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return 0;
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bad_or_fault:
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@ -296,6 +296,13 @@ static struct mem_type mem_types[] __ro_after_init = {
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.prot_sect = PMD_TYPE_SECT | PMD_SECT_AP_WRITE,
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.domain = DOMAIN_KERNEL,
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},
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[MT_MEMORY_RO] = {
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.prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
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L_PTE_XN | L_PTE_RDONLY,
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.prot_l1 = PMD_TYPE_TABLE,
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.prot_sect = PMD_TYPE_SECT,
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.domain = DOMAIN_KERNEL,
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},
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[MT_ROM] = {
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.prot_sect = PMD_TYPE_SECT,
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.domain = DOMAIN_KERNEL,
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@ -489,6 +496,7 @@ static void __init build_mem_type_table(void)
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/* Also setup NX memory mapping */
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mem_types[MT_MEMORY_RW].prot_sect |= PMD_SECT_XN;
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mem_types[MT_MEMORY_RO].prot_sect |= PMD_SECT_XN;
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}
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if (cpu_arch >= CPU_ARCH_ARMv7 && (cr & CR_TRE)) {
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/*
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@ -568,6 +576,7 @@ static void __init build_mem_type_table(void)
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mem_types[MT_ROM].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
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mem_types[MT_MINICLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
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mem_types[MT_CACHECLEAN].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
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mem_types[MT_MEMORY_RO].prot_sect |= PMD_SECT_APX|PMD_SECT_AP_WRITE;
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#endif
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/*
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@ -587,6 +596,8 @@ static void __init build_mem_type_table(void)
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mem_types[MT_MEMORY_RWX].prot_pte |= L_PTE_SHARED;
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mem_types[MT_MEMORY_RW].prot_sect |= PMD_SECT_S;
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mem_types[MT_MEMORY_RW].prot_pte |= L_PTE_SHARED;
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mem_types[MT_MEMORY_RO].prot_sect |= PMD_SECT_S;
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mem_types[MT_MEMORY_RO].prot_pte |= L_PTE_SHARED;
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mem_types[MT_MEMORY_DMA_READY].prot_pte |= L_PTE_SHARED;
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mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |= PMD_SECT_S;
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mem_types[MT_MEMORY_RWX_NONCACHED].prot_pte |= L_PTE_SHARED;
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@ -647,6 +658,8 @@ static void __init build_mem_type_table(void)
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mem_types[MT_MEMORY_RWX].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_RW].prot_sect |= ecc_mask | cp->pmd;
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mem_types[MT_MEMORY_RW].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_RO].prot_sect |= ecc_mask | cp->pmd;
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mem_types[MT_MEMORY_RO].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_DMA_READY].prot_pte |= kern_pgprot;
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mem_types[MT_MEMORY_RWX_NONCACHED].prot_sect |= ecc_mask;
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mem_types[MT_ROM].prot_sect |= cp->pmd;
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@ -1360,7 +1373,7 @@ static void __init devicemaps_init(const struct machine_desc *mdesc)
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map.pfn = __phys_to_pfn(__atags_pointer & SECTION_MASK);
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map.virtual = FDT_FIXED_BASE;
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map.length = FDT_FIXED_SIZE;
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map.type = MT_ROM;
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map.type = MT_MEMORY_RO;
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create_mapping(&map);
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}
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@ -108,8 +108,7 @@ static unsigned int spectre_v2_install_workaround(unsigned int method)
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#else
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static unsigned int spectre_v2_install_workaround(unsigned int method)
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{
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pr_info("CPU%u: Spectre V2: workarounds disabled by configuration\n",
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smp_processor_id());
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pr_info_once("Spectre V2: workarounds disabled by configuration\n");
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return SPECTRE_VULNERABLE;
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}
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@ -209,10 +208,10 @@ static int spectre_bhb_install_workaround(int method)
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return SPECTRE_VULNERABLE;
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spectre_bhb_method = method;
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}
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pr_info("CPU%u: Spectre BHB: using %s workaround\n",
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smp_processor_id(), spectre_bhb_method_name(method));
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pr_info("CPU%u: Spectre BHB: enabling %s workaround for all CPUs\n",
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smp_processor_id(), spectre_bhb_method_name(method));
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}
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return SPECTRE_MITIGATED;
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}
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@ -14,6 +14,7 @@
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#include <linux/types.h>
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#include <linux/stddef.h>
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#include <asm/probes.h>
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#include <asm/ptrace.h>
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#include <asm/kprobes.h>
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void __init arm_probes_decode_init(void);
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@ -35,31 +36,6 @@ void __init find_str_pc_offset(void);
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#endif
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/*
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* Update ITSTATE after normal execution of an IT block instruction.
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*
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* The 8 IT state bits are split into two parts in CPSR:
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* ITSTATE<1:0> are in CPSR<26:25>
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* ITSTATE<7:2> are in CPSR<15:10>
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*/
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static inline unsigned long it_advance(unsigned long cpsr)
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{
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if ((cpsr & 0x06000400) == 0) {
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/* ITSTATE<2:0> == 0 means end of IT block, so clear IT state */
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cpsr &= ~PSR_IT_MASK;
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} else {
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/* We need to shift left ITSTATE<4:0> */
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const unsigned long mask = 0x06001c00; /* Mask ITSTATE<4:0> */
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unsigned long it = cpsr & mask;
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it <<= 1;
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it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */
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it &= mask;
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cpsr &= ~mask;
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cpsr |= it;
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}
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return cpsr;
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}
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static inline void __kprobes bx_write_pc(long pcv, struct pt_regs *regs)
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{
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long cpsr = regs->ARM_cpsr;
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@ -493,13 +493,8 @@ static int amba_device_try_add(struct amba_device *dev, struct resource *parent)
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goto skip_probe;
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ret = amba_read_periphid(dev);
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if (ret) {
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if (ret != -EPROBE_DEFER) {
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amba_device_put(dev);
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goto err_out;
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}
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if (ret)
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goto err_release;
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}
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skip_probe:
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ret = device_add(&dev->dev);
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continue;
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list_del_init(&ddev->node);
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amba_device_put(ddev->dev);
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kfree(ddev);
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}
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