mirror of
https://github.com/Fishwaldo/linux-bl808.git
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Here is some more omap clean-up. The biggest changes are
hwmod, clock, and System Control Module cleanup, and the removal of the last instance of omap_read/write usage for omap2+ with the removal of unused USB OHCI Full Speed driver support. The removed OHCI is only currently used for omap1 as the actively used omap2+ boards have either MUSB or another instance of OHCI+EHCI that's more usable. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJP8AYmAAoJEBvUPslcq6VzH2sP/0QlWA9Xl31AnGUgKJ3p5W3A mjtLf9jHicOisSfYiEnuePHKwLnw7HZniI0xNcHXnFpRcDsxK8q2bmuFVpmqpIBv OaCTfnOY+hpZR0/sLRQrKRZF13zYiro40StrhgxrSUV6cGwky+fJx/63J3j16NeV TJkX4FjJXdAiGi/E7v+5XmQn3rpfcjntaDZgGSravVv1U1kYMMfN/2lHAvrALS+w c8xqommerOnSp0IfjAtPeLnDdgdDXDxSq7MRGyDbNmxffjDR/leTC7j1xl0j0S+O PSSvUa8aypeBWo9ckH77sXgiaAaMxVLu/X4ksPDijDdBkHsuQSffuj4swJP9B3d5 4d0ryvBqJhfvvgnL6a3emYhiZXgdbYbnerA+smm1Hf5VhGt5BWvZkJgS2RBUWLdW j4OsaSI+vGhsYFjINNZ6QY3S1OeolGb8qBjNVHN0XsUg/tQPQZCMIjm2Zl+OM7Ex 60mtVoNysA0VKl/bzQ9jH6BwAYkcKli8bHDrvHm5a73DunVrCOG7TmKM4g108kvo ccVCcEb3XEuqOfi+Nk6MSUQcHc1TkeDeAA9OtoFSi5hYwEh19w7UotRpsAVw2/Qe D+Rrm4QvfUrDYKRfbj6LRaNRxkgvVnqJ5mC1SyiIbuLLjkZPJDomMATOZ66dYNUi /tUf+6znwg+Iki+8rlhx =A9qD -----END PGP SIGNATURE----- mergetag objectc59b537d87
type commit tag omap-devel-dmtimer-for-v3.6 tagger Tony Lindgren <tony@atomide.com> 1341130362 -0700 Here are some omap dmtimer changes to make it easier to add device tree support for dmtimer by simplifying the platform data structure used by dmtimr. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJP8AbkAAoJEBvUPslcq6Vz46YQAJZ7dWwSKHSQjuIx2j9iloi6 zIgvX8secC8yrli88I27fcAB7qGI9fulebEGQXCu7s3OzHI3/FO1KTAMdW31y4it 6WUkdWkSHfFtFiOcRjR9QTEuQ58Fii550iVcn8qezDizYfnd6ThwPHhhZek39oJC qSzb2jqvvHgVuMPqpXkCDmQnH3JoEqGZ2Qg+JlyuW9mMmq3ipK7BTY9vLIcCPvdu ET0rBvSmTr7s/XBMtDLseCHD3XsgnQ8dY0i7j3BWtCSkNjz2DFhj4zXL3/3f+ff6 KCIrkY5CK1R4x4vithXyLpqgniwj66eOOHdnL78iV4Am7jQrbIyvC9k5LeQE28XD QgB718tO8UVRfAKmA9/zAwLJUN4lg8OUw2PrCBPxy4GXxY0Wu670gD+AqtSEwqV8 8ifOEltLO/46jb/zdBFvNJ+69C0XZdSN48SpdZbGzVVaNMxWprSGxF3hdf8EnbjF /0F0A8dCtgMcIDgr+hUkSSM+AVVzlxr9imvATsAFTLlgq3G8LQ4bGSh/ywuNN5jn Ql5ZkuxBVIWwWcd68vCKQVH/X/mPj6jtmz1qRZZTOCbV7oM8/YVQP37tkn6jk+xl 2ZCUrggvUcDYxVx0N1Eb4Yixje4BsrMPFn0zVjKSTzVMpYobxqVuNYPFfZ7ROJnf caxP57fcIOC3pYp4VYtq =L0+0 -----END PGP SIGNATURE----- mergetag object6fd8246b1c
type commit tag omap-devel-am33xx-for-v3.6 tagger Tony Lindgren <tony@atomide.com> 1341131157 -0700 Here are changes to add support for am33xx processors for the clock, power, and voltagedomains. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJP8Am6AAoJEBvUPslcq6VzhVsP/31PxWaX0JboIbAP0VlmJ+GK J9gIxs2ohx3fDcx4D3da7rLlDue4E0oKmftbj0G4Iom22si2HrtmCnkq41anOkDA UA9hW8kYfQJr90BzHYuIvOncpb6w6mzjJu7QDSO3j2l1FssoG+rOcDrW0EUSdzhF 1pIaGairntUAsI/EE3Ja6r0reRgacV4CmWksatp3mzxpbyA2+m2zJj8IovY1ghPZ jq3zcLm4LCxDyiCDYcz6Jrt9fH9OA2cEQ/q0gHKspHvr2lsRu7gzN5gvi+700oML vIT42/rC6tppf72113arZ+vKluJfa9LhgD0G7JcDqCyRxmwe0w3cKZKWrVklolsZ sHATYxliWk4gB+pipw8W/hEHKGKPgPEPEAd60RN3g3/SDBo/fcQKvsF5/sZldC70 ngagTSseCKGUOQxWJ1+eRqG+I5WIzgorunNIbN/N9dGyxQ3C+zDAgDbdar24sWFn 1bA1wH7iwEYaqGOCEKfwodl+tSGAeuVXm4e2fR81sHRYY6eIFCKCdExZ/DPJrFTt FnbV2OgKKz9xYcw6MNmfVEk3TkMSNwFO+g+EtzM1km5oW6PIxkGoiDydxHGvN3fq gWfv7Y7AJCnbiqKBSahE1WkVADXYTlXk1ySzjHluPXJmqh/iUYDmpKKMYEFQYgyg ekpI3teAadGhu5ZIrqG5 =bc0b -----END PGP SIGNATURE----- Merge tags 'omap-cleanup-for-v3.6', 'omap-devel-dmtimer-for-v3.6' and 'omap-devel-am33xx-for-v3.6' into devel-am33xx-part2
This commit is contained in:
commit
3f96a2d90e
79 changed files with 3751 additions and 1306 deletions
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@ -69,11 +69,6 @@
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#define OMAP3_SECURE_TIMER 1
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#endif
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/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
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#define MAX_GPTIMER_ID 12
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static u32 sys_timer_reserved;
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/* Clockevent code */
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static struct omap_dm_timer clkev;
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@ -180,7 +175,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
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omap_hwmod_enable(oh);
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sys_timer_reserved |= (1 << (gptimer_id - 1));
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if (omap_dm_timer_reserve_systimer(gptimer_id))
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return -ENODEV;
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if (gptimer_id != 12) {
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struct clk *src;
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@ -368,6 +364,11 @@ OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE,
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OMAP_SYS_TIMER(3_secure)
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#endif
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#ifdef CONFIG_SOC_AM33XX
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OMAP_SYS_TIMER_INIT(3_am33xx, 1, OMAP4_MPU_SOURCE, 2, OMAP4_MPU_SOURCE)
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OMAP_SYS_TIMER(3_am33xx)
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#endif
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#ifdef CONFIG_ARCH_OMAP4
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#ifdef CONFIG_LOCAL_TIMERS
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static DEFINE_TWD_LOCAL_TIMER(twd_local_timer,
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@ -393,66 +394,6 @@ static void __init omap4_timer_init(void)
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OMAP_SYS_TIMER(4)
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#endif
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/**
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* omap2_dm_timer_set_src - change the timer input clock source
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* @pdev: timer platform device pointer
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* @source: array index of parent clock source
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*/
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static int omap2_dm_timer_set_src(struct platform_device *pdev, int source)
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{
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int ret;
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struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
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struct clk *fclk, *parent;
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char *parent_name = NULL;
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fclk = clk_get(&pdev->dev, "fck");
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if (IS_ERR_OR_NULL(fclk)) {
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dev_err(&pdev->dev, "%s: %d: clk_get() FAILED\n",
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__func__, __LINE__);
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return -EINVAL;
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}
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switch (source) {
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case OMAP_TIMER_SRC_SYS_CLK:
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parent_name = "sys_ck";
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break;
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case OMAP_TIMER_SRC_32_KHZ:
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parent_name = "32k_ck";
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break;
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case OMAP_TIMER_SRC_EXT_CLK:
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if (pdata->timer_ip_version == OMAP_TIMER_IP_VERSION_1) {
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parent_name = "alt_ck";
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break;
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}
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dev_err(&pdev->dev, "%s: %d: invalid clk src.\n",
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__func__, __LINE__);
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clk_put(fclk);
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return -EINVAL;
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}
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parent = clk_get(&pdev->dev, parent_name);
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if (IS_ERR_OR_NULL(parent)) {
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dev_err(&pdev->dev, "%s: %d: clk_get() %s FAILED\n",
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__func__, __LINE__, parent_name);
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clk_put(fclk);
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return -EINVAL;
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}
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ret = clk_set_parent(fclk, parent);
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if (IS_ERR_VALUE(ret)) {
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dev_err(&pdev->dev, "%s: clk_set_parent() to %s FAILED\n",
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__func__, parent_name);
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ret = -EINVAL;
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}
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clk_put(parent);
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clk_put(fclk);
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return ret;
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}
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/**
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* omap_timer_init - build and register timer device with an
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* associated timer hwmod
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@ -473,7 +414,6 @@ static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
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struct dmtimer_platform_data *pdata;
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struct platform_device *pdev;
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struct omap_timer_capability_dev_attr *timer_dev_attr;
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struct powerdomain *pwrdm;
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pr_debug("%s: %s\n", __func__, oh->name);
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*/
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sscanf(oh->name, "timer%2d", &id);
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pdata->set_timer_src = omap2_dm_timer_set_src;
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pdata->timer_ip_version = oh->class->rev;
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if (timer_dev_attr)
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pdata->timer_capability = timer_dev_attr->timer_capability;
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/* Mark clocksource and clockevent timers as reserved */
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if ((sys_timer_reserved >> (id - 1)) & 0x1)
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pdata->reserved = 1;
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pwrdm = omap_hwmod_get_pwrdm(oh);
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pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
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#ifdef CONFIG_PM
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pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
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#endif
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pdev = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
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NULL, 0, 0);
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