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arm64/sve: ptrace and ELF coredump support
This patch defines and implements a new regset NT_ARM_SVE, which describes a thread's SVE register state. This allows a debugger to manipulate the SVE state, as well as being included in ELF coredumps for post-mortem debugging. Because the regset size and layout are dependent on the thread's current vector length, it is not possible to define a C struct to describe the regset contents as is done for existing regsets. Instead, and for the same reasons, NT_ARM_SVE is based on the freeform variable-layout approach used for the SVE signal frame. Additionally, to reduce debug overhead when debugging threads that might or might not have live SVE register state, NT_ARM_SVE may be presented in one of two different formats: the old struct user_fpsimd_state format is embedded for describing the state of a thread with no live SVE state, whereas a new variable-layout structure is embedded for describing live SVE state. This avoids a debugger needing to poll NT_PRFPREG in addition to NT_ARM_SVE, and allows existing userspace code to handle the non-SVE case without too much modification. For this to work, NT_ARM_SVE is defined with a fixed-format header of type struct user_sve_header, which the recipient can use to figure out the content, size and layout of the reset of the regset. Accessor macros are defined to allow the vector-length-dependent parts of the regset to be manipulated. Signed-off-by: Alan Hayward <alan.hayward@arm.com> Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Alex Bennée <alex.bennee@linaro.org> Cc: Okamoto Takayuki <tokamoto@jp.fujitsu.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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5 changed files with 482 additions and 9 deletions
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@ -416,6 +416,7 @@ typedef struct elf64_shdr {
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#define NT_ARM_HW_BREAK 0x402 /* ARM hardware breakpoint registers */
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#define NT_ARM_HW_WATCH 0x403 /* ARM hardware watchpoint registers */
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#define NT_ARM_SYSTEM_CALL 0x404 /* ARM system call number */
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#define NT_ARM_SVE 0x405 /* ARM Scalable Vector Extension registers */
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#define NT_METAG_CBUF 0x500 /* Metag catch buffer registers */
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#define NT_METAG_RPIPE 0x501 /* Metag read pipeline state */
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#define NT_METAG_TLS 0x502 /* Metag TLS pointer */
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