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powerpc/64s: Remove POWER4 support
POWER4 has been broken since at least the change 49d09bf2a6
("powerpc/64s: Optimise MSR handling in exception handling"), which
requires mtmsrd L=1 support. This was introduced in ISA v2.01, and
POWER4 supports ISA v2.00.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
This commit is contained in:
parent
3735eb850e
commit
471d7ff8b5
10 changed files with 18 additions and 692 deletions
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@ -133,36 +133,6 @@ extern void __restore_cpu_e6500(void);
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static struct cpu_spec __initdata cpu_specs[] = {
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#ifdef CONFIG_PPC_BOOK3S_64
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{ /* Power4 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00350000,
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.cpu_name = "POWER4 (gp)",
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.cpu_features = CPU_FTRS_POWER4,
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.cpu_user_features = COMMON_USER_POWER4,
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.mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.pmc_type = PPC_PMC_IBM,
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.oprofile_cpu_type = "ppc64/power4",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "power4",
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},
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{ /* Power4+ */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00380000,
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.cpu_name = "POWER4+ (gq)",
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.cpu_features = CPU_FTRS_POWER4,
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.cpu_user_features = COMMON_USER_POWER4,
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.mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 8,
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.pmc_type = PPC_PMC_IBM,
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.oprofile_cpu_type = "ppc64/power4",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.platform = "power4",
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},
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{ /* PPC970 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00390000,
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@ -628,15 +598,15 @@ static struct cpu_spec __initdata cpu_specs[] = {
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{ /* default match */
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.pvr_mask = 0x00000000,
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.pvr_value = 0x00000000,
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.cpu_name = "POWER4 (compatible)",
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.cpu_name = "POWER5 (compatible)",
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.cpu_features = CPU_FTRS_COMPATIBLE,
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.cpu_user_features = COMMON_USER_PPC64,
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.mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
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.mmu_features = MMU_FTRS_POWER,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_IBM,
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.platform = "power4",
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.platform = "power5",
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}
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#endif /* CONFIG_PPC_BOOK3S_64 */
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