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dmaengine: Revert "drivers/dma: remove unused support for MEMSET operations"

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This reverts commit 48a9db462d.

Some platforms actually need support for the memset operations. Bring it back.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Maxime Ripard 2015-05-18 13:46:15 +02:00 • committed by Vinod Koul
parent fbea28a2af
commit 4983a501af
2 changed files with 26 additions and 0 deletions
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2
drivers/dma/dmaengine.c
View file

@ -832,6 +832,8 @@ int dma_async_device_register(struct dma_device *device)
!device->device_prep_dma_pq); !device->device_prep_dma_pq);
BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) && BUG_ON(dma_has_cap(DMA_PQ_VAL, device->cap_mask) &&
!device->device_prep_dma_pq_val); !device->device_prep_dma_pq_val);
BUG_ON(dma_has_cap(DMA_MEMSET, device->cap_mask) &&
!device->device_prep_dma_memset);
BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) && BUG_ON(dma_has_cap(DMA_INTERRUPT, device->cap_mask) &&
!device->device_prep_dma_interrupt); !device->device_prep_dma_interrupt);
BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) && BUG_ON(dma_has_cap(DMA_SG, device->cap_mask) &&

24
include/linux/dmaengine.h
View file

@ -65,6 +65,7 @@ enum dma_transaction_type {
DMA_PQ, DMA_PQ,
DMA_XOR_VAL, DMA_XOR_VAL,
DMA_PQ_VAL, DMA_PQ_VAL,
DMA_MEMSET,
DMA_INTERRUPT, DMA_INTERRUPT,
DMA_SG, DMA_SG,
DMA_PRIVATE, DMA_PRIVATE,
@ -570,6 +571,7 @@ struct dma_tx_state {
* @copy_align: alignment shift for memcpy operations * @copy_align: alignment shift for memcpy operations
* @xor_align: alignment shift for xor operations * @xor_align: alignment shift for xor operations
* @pq_align: alignment shift for pq operations * @pq_align: alignment shift for pq operations
* @fill_align: alignment shift for memset operations
* @dev_id: unique device ID * @dev_id: unique device ID
* @dev: struct device reference for dma mapping api * @dev: struct device reference for dma mapping api
* @src_addr_widths: bit mask of src addr widths the device supports * @src_addr_widths: bit mask of src addr widths the device supports
@ -588,6 +590,7 @@ struct dma_tx_state {
* @device_prep_dma_xor_val: prepares a xor validation operation * @device_prep_dma_xor_val: prepares a xor validation operation
* @device_prep_dma_pq: prepares a pq operation * @device_prep_dma_pq: prepares a pq operation
* @device_prep_dma_pq_val: prepares a pqzero_sum operation * @device_prep_dma_pq_val: prepares a pqzero_sum operation
* @device_prep_dma_memset: prepares a memset operation
* @device_prep_dma_interrupt: prepares an end of chain interrupt operation * @device_prep_dma_interrupt: prepares an end of chain interrupt operation
* @device_prep_slave_sg: prepares a slave dma operation * @device_prep_slave_sg: prepares a slave dma operation
* @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio. * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio.
@ -620,6 +623,7 @@ struct dma_device {
u8 copy_align; u8 copy_align;
u8 xor_align; u8 xor_align;
u8 pq_align; u8 pq_align;
u8 fill_align;
#define DMA_HAS_PQ_CONTINUE (1 << 15) #define DMA_HAS_PQ_CONTINUE (1 << 15)
int dev_id; int dev_id;
@ -650,6 +654,9 @@ struct dma_device {
struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src,
unsigned int src_cnt, const unsigned char *scf, size_t len, unsigned int src_cnt, const unsigned char *scf, size_t len,
enum sum_check_flags *pqres, unsigned long flags); enum sum_check_flags *pqres, unsigned long flags);
struct dma_async_tx_descriptor *(*device_prep_dma_memset)(
struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
unsigned long flags);
struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(
struct dma_chan *chan, unsigned long flags); struct dma_chan *chan, unsigned long flags);
struct dma_async_tx_descriptor *(*device_prep_dma_sg)( struct dma_async_tx_descriptor *(*device_prep_dma_sg)(
@ -745,6 +752,17 @@ static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma(
return chan->device->device_prep_interleaved_dma(chan, xt, flags); return chan->device->device_prep_interleaved_dma(chan, xt, flags);
} }
static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset(
struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
unsigned long flags)
{
if (!chan || !chan->device)
return NULL;
return chan->device->device_prep_dma_memset(chan, dest, value,
len, flags);
}
static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_sg( static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_sg(
struct dma_chan *chan, struct dma_chan *chan,
struct scatterlist *dst_sg, unsigned int dst_nents, struct scatterlist *dst_sg, unsigned int dst_nents,
@ -820,6 +838,12 @@ static inline bool is_dma_pq_aligned(struct dma_device *dev, size_t off1,
return dmaengine_check_align(dev->pq_align, off1, off2, len); return dmaengine_check_align(dev->pq_align, off1, off2, len);
} }
static inline bool is_dma_fill_aligned(struct dma_device *dev, size_t off1,
size_t off2, size_t len)
{
return dmaengine_check_align(dev->fill_align, off1, off2, len);
}
static inline void static inline void
dma_set_maxpq(struct dma_device *dma, int maxpq, int has_pq_continue) dma_set_maxpq(struct dma_device *dma, int maxpq, int has_pq_continue)
{ {