clk: tegra: Implement memory-controller clock

The memory controller clock runs either at half or the same frequency as
the EMC clock.

Reviewed-By: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2014-07-29 10:17:53 +02:00
parent 7f06dd6124
commit 4f4f85fa0b
9 changed files with 43 additions and 7 deletions

View file

@ -49,7 +49,7 @@
#define TEGRA114_CLK_I2S0 30
/* 31 */
/* 32 */
#define TEGRA114_CLK_MC 32
/* 33 */
#define TEGRA114_CLK_APBDMA 34
/* 35 */

View file

@ -48,7 +48,7 @@
#define TEGRA124_CLK_I2S0 30
/* 31 */
/* 32 */
#define TEGRA124_CLK_MC 32
/* 33 */
#define TEGRA124_CLK_APBDMA 34
/* 35 */

View file

@ -49,7 +49,7 @@
/* 30 */
#define TEGRA20_CLK_CACHE2 31
#define TEGRA20_CLK_MEM 32
#define TEGRA20_CLK_MC 32
#define TEGRA20_CLK_AHBDMA 33
#define TEGRA20_CLK_APBDMA 34
/* 35 */