bcma: add bcma_core_pci_power_save()

This enables or disables power saving on the PCIe bus when the wifi is
in operation or not.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Hauke Mehrtens 2013-08-24 00:32:33 +02:00 committed by John W. Linville
parent 780335acc8
commit 521deea640
2 changed files with 53 additions and 3 deletions

View file

@ -181,6 +181,26 @@ struct pci_dev;
#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
#define BCMA_CORE_PCI_
/* MDIO devices (SERDES modules) */
#define BCMA_CORE_PCI_MDIO_IEEE0 0x000
#define BCMA_CORE_PCI_MDIO_IEEE1 0x001
#define BCMA_CORE_PCI_MDIO_BLK0 0x800
#define BCMA_CORE_PCI_MDIO_BLK1 0x801
#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16
#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17
#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18
#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19
#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A
#define BCMA_CORE_PCI_MDIO_BLK2 0x802
#define BCMA_CORE_PCI_MDIO_BLK3 0x803
#define BCMA_CORE_PCI_MDIO_BLK4 0x804
#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */
#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820
#define BCMA_CORE_PCI_MDIO_SERDESID 0x831
#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840
/* PCIE Root Capability Register bits (Host mode only) */
#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001