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Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (74 commits) PCI: make msi_free_irqs() to use msix_mask_irq() instead of open coded write PCI: Fix the NIU MSI-X problem in a better way PCI ASPM: remove get_root_port_link PCI ASPM: cleanup pcie_aspm_sanity_check PCI ASPM: remove has_switch field PCI ASPM: cleanup calc_Lx_latency PCI ASPM: cleanup pcie_aspm_get_cap_device PCI ASPM: cleanup clkpm checks PCI ASPM: cleanup __pcie_aspm_check_state_one PCI ASPM: cleanup initialization PCI ASPM: cleanup change input argument of aspm functions PCI ASPM: cleanup misc in struct pcie_link_state PCI ASPM: cleanup clkpm state in struct pcie_link_state PCI ASPM: cleanup latency field in struct pcie_link_state PCI ASPM: cleanup aspm state field in struct pcie_link_state PCI ASPM: fix typo in struct pcie_link_state PCI: drivers/pci/slot.c should depend on CONFIG_SYSFS PCI: remove redundant __msi_set_enable() PCI PM: consistently use type bool for wake enable variable x86/ACPI: Correct maximum allowed _CRS returned resources and warn if exceeded ...
This commit is contained in:
commit
59ef7a83f1
55 changed files with 3031 additions and 2194 deletions
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@ -49,6 +49,8 @@ struct resource_list {
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#define IORESOURCE_SIZEALIGN 0x00020000 /* size indicates alignment */
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#define IORESOURCE_STARTALIGN 0x00040000 /* start field is alignment */
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#define IORESOURCE_MEM_64 0x00100000
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#define IORESOURCE_EXCLUSIVE 0x08000000 /* Userland may not map this resource */
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#define IORESOURCE_DISABLED 0x10000000
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#define IORESOURCE_UNSET 0x20000000
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@ -15,7 +15,7 @@ static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
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{
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struct pci_bus *pbus = pdev->bus;
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/* Find a PCI root bus */
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while (pbus->parent)
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while (!pci_is_root_bus(pbus))
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pbus = pbus->parent;
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return acpi_get_pci_rootbridge_handle(pci_domain_nr(pbus),
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pbus->number);
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@ -23,7 +23,7 @@ static inline acpi_handle acpi_find_root_bridge_handle(struct pci_dev *pdev)
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static inline acpi_handle acpi_pci_get_bridge_handle(struct pci_bus *pbus)
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{
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if (pbus->parent)
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if (!pci_is_root_bus(pbus))
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return DEVICE_ACPI_HANDLE(&(pbus->self->dev));
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return acpi_get_pci_rootbridge_handle(pci_domain_nr(pbus),
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pbus->number);
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@ -607,8 +607,6 @@ extern void pci_sort_breadthfirst(void);
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struct pci_dev __deprecated *pci_find_device(unsigned int vendor,
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unsigned int device,
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struct pci_dev *from);
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struct pci_dev __deprecated *pci_find_slot(unsigned int bus,
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unsigned int devfn);
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#endif /* CONFIG_PCI_LEGACY */
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enum pci_lost_interrupt_reason {
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@ -647,6 +645,7 @@ int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
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int where, u16 val);
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int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
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int where, u32 val);
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struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops);
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static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val)
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{
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@ -711,8 +710,8 @@ int pcix_get_mmrbc(struct pci_dev *dev);
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int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
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int pcie_get_readrq(struct pci_dev *dev);
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int pcie_set_readrq(struct pci_dev *dev, int rq);
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int __pci_reset_function(struct pci_dev *dev);
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int pci_reset_function(struct pci_dev *dev);
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int pci_execute_reset_function(struct pci_dev *dev);
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void pci_update_resource(struct pci_dev *dev, int resno);
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int __must_check pci_assign_resource(struct pci_dev *dev, int i);
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int pci_select_bars(struct pci_dev *dev, unsigned long flags);
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@ -732,7 +731,7 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
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pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
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bool pci_pme_capable(struct pci_dev *dev, pci_power_t state);
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void pci_pme_active(struct pci_dev *dev, bool enable);
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int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
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int pci_enable_wake(struct pci_dev *dev, pci_power_t state, bool enable);
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int pci_wake_from_d3(struct pci_dev *dev, bool enable);
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pci_power_t pci_target_state(struct pci_dev *dev);
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int pci_prepare_to_sleep(struct pci_dev *dev);
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@ -798,7 +797,7 @@ const struct pci_device_id *pci_match_id(const struct pci_device_id *ids,
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int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max,
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int pass);
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void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *),
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void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
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void *userdata);
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int pci_cfg_space_size_ext(struct pci_dev *dev);
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int pci_cfg_space_size(struct pci_dev *dev);
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@ -888,6 +887,17 @@ static inline int pcie_aspm_enabled(void)
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extern int pcie_aspm_enabled(void);
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#endif
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#ifndef CONFIG_PCIE_ECRC
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static inline void pcie_set_ecrc_checking(struct pci_dev *dev)
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{
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return;
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}
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static inline void pcie_ecrc_get_policy(char *str) {};
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#else
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extern void pcie_set_ecrc_checking(struct pci_dev *dev);
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extern void pcie_ecrc_get_policy(char *str);
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#endif
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#define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
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#ifdef CONFIG_HT_IRQ
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@ -944,12 +954,6 @@ static inline struct pci_dev *pci_find_device(unsigned int vendor,
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return NULL;
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}
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static inline struct pci_dev *pci_find_slot(unsigned int bus,
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unsigned int devfn)
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{
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return NULL;
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}
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static inline struct pci_dev *pci_get_device(unsigned int vendor,
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unsigned int device,
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struct pci_dev *from)
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@ -1105,6 +1109,10 @@ static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus,
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#include <asm/pci.h>
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#ifndef PCIBIOS_MAX_MEM_32
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#define PCIBIOS_MAX_MEM_32 (-1)
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#endif
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/* these helpers provide future and backwards compatibility
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* for accessing popular PCI BAR info */
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#define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start)
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@ -1261,5 +1269,10 @@ static inline irqreturn_t pci_sriov_migration(struct pci_dev *dev)
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}
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#endif
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#if defined(CONFIG_HOTPLUG_PCI) || defined(CONFIG_HOTPLUG_PCI_MODULE)
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extern void pci_hp_create_module_link(struct pci_slot *pci_slot);
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extern void pci_hp_remove_module_link(struct pci_slot *pci_slot);
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#endif
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#endif /* __KERNEL__ */
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#endif /* LINUX_PCI_H */
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@ -66,17 +66,10 @@ enum pcie_link_speed {
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PCIE_LNK_SPEED_UNKNOWN = 0xFF,
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};
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struct hotplug_slot;
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struct hotplug_slot_attribute {
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struct attribute attr;
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ssize_t (*show)(struct hotplug_slot *, char *);
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ssize_t (*store)(struct hotplug_slot *, const char *, size_t);
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};
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#define to_hotplug_attr(n) container_of(n, struct hotplug_slot_attribute, attr);
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/**
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* struct hotplug_slot_ops -the callbacks that the hotplug pci core can use
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* @owner: The module owner of this structure
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* @mod_name: The module name (KBUILD_MODNAME) of this structure
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* @enable_slot: Called when the user wants to enable a specific pci slot
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* @disable_slot: Called when the user wants to disable a specific pci slot
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* @set_attention_status: Called to set the specific slot's attention LED to
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@ -109,6 +102,7 @@ struct hotplug_slot_attribute {
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*/
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struct hotplug_slot_ops {
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struct module *owner;
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const char *mod_name;
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int (*enable_slot) (struct hotplug_slot *slot);
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int (*disable_slot) (struct hotplug_slot *slot);
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int (*set_attention_status) (struct hotplug_slot *slot, u8 value);
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@ -167,12 +161,21 @@ static inline const char *hotplug_slot_name(const struct hotplug_slot *slot)
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return pci_slot_name(slot->pci_slot);
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}
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extern int pci_hp_register(struct hotplug_slot *, struct pci_bus *, int nr,
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const char *name);
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extern int __pci_hp_register(struct hotplug_slot *slot, struct pci_bus *pbus,
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int nr, const char *name,
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struct module *owner, const char *mod_name);
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extern int pci_hp_deregister(struct hotplug_slot *slot);
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extern int __must_check pci_hp_change_slot_info (struct hotplug_slot *slot,
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struct hotplug_slot_info *info);
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static inline int pci_hp_register(struct hotplug_slot *slot,
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struct pci_bus *pbus,
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int devnr, const char *name)
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{
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return __pci_hp_register(slot, pbus, devnr, name,
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THIS_MODULE, KBUILD_MODNAME);
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}
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/* PCI Setting Record (Type 0) */
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struct hpp_type0 {
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u32 revision;
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@ -295,8 +295,9 @@
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#define PCI_MSI_ADDRESS_LO 4 /* Lower 32 bits */
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#define PCI_MSI_ADDRESS_HI 8 /* Upper 32 bits (if PCI_MSI_FLAGS_64BIT set) */
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#define PCI_MSI_DATA_32 8 /* 16 bits of data for 32-bit devices */
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#define PCI_MSI_MASK_32 12 /* Mask bits register for 32-bit devices */
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#define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */
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#define PCI_MSI_MASK_BIT 16 /* Mask bits register */
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#define PCI_MSI_MASK_64 16 /* Mask bits register for 64-bit devices */
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/* MSI-X registers (these are at offset PCI_MSIX_FLAGS) */
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#define PCI_MSIX_FLAGS 2
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#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
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#define PCI_MSIX_FLAGS_MASKALL (1 << 14)
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#define PCI_MSIX_FLAGS_BIRMASK (7 << 0)
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#define PCI_MSIX_FLAGS_BITMASK (1 << 0)
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/* CompactPCI Hotswap Register */
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