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sh: add clk_round_parent() to optimize parent clock rate
Sometimes it is possible and reasonable to adjust the parent clock rate to improve precision of the child clock, e.g., if the child clock has no siblings. clk_round_parent() is a new addition to the SH clock-framework API, that implements such an optimization for child clocks with divisors, taking all integer values in a range. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -122,6 +122,10 @@ int clk_rate_table_find(struct clk *clk,
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long clk_rate_div_range_round(struct clk *clk, unsigned int div_min,
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unsigned int div_max, unsigned long rate);
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long clk_round_parent(struct clk *clk, unsigned long target,
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unsigned long *best_freq, unsigned long *parent_freq,
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unsigned int div_min, unsigned int div_max);
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#define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \
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{ \
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.parent = _parent, \
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