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RISC-V: Setup exception vector early
The trap vector is set only in trap_init which may be too late in some cases. Early ioremap/efi spits many warning messages which may be useful. Setup the trap vector early so that any warning/bug can be handled before generic code invokes trap_init. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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3 changed files with 10 additions and 10 deletions
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@ -154,10 +154,10 @@ asmlinkage __visible void smp_callin(void)
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mmgrab(mm);
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current->active_mm = mm;
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trap_init();
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notify_cpu_starting(curr_cpuid);
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update_siblings_masks(curr_cpuid);
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set_cpu_online(curr_cpuid, 1);
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/*
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* Remote TLB flushes are ignored while the CPU is offline, so emit
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* a local TLB flush right now just in case.
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