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net: mtk_eth_soc: add support for in-band 802.3z negotiation
As a result of help from Frank Wunderlich to investigate and test, we now know how to program this PCS for in-band 802.3z negotiation. Add support for this by moving the contents of the two functions into the common mtk_pcs_config() function and adding the register settings for 802.3z negotiation. Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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commit
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1 changed files with 42 additions and 35 deletions
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@ -33,41 +33,15 @@ static void mtk_pcs_get_state(struct phylink_pcs *pcs,
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FIELD_GET(SGMII_LPA, adv));
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}
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/* For SGMII interface mode */
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static void mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs)
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{
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regmap_update_bits(mpcs->regmap, SGMSYS_SGMII_MODE,
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SGMII_REMOTE_FAULT_DIS, SGMII_REMOTE_FAULT_DIS);
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regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1,
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SGMII_AN_RESTART, SGMII_AN_RESTART);
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}
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/* For 1000BASE-X and 2500BASE-X interface modes, which operate at a
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* fixed speed.
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*/
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static void mtk_pcs_setup_mode_force(struct mtk_pcs *mpcs,
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phy_interface_t interface)
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{
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/* Disable SGMII AN */
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regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1,
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SGMII_AN_ENABLE, 0);
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/* Set the speed etc but leave the duplex unchanged */
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regmap_update_bits(mpcs->regmap, SGMSYS_SGMII_MODE,
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SGMII_IF_MODE_MASK & ~SGMII_DUPLEX_FULL,
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SGMII_SPEED_1000);
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}
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static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
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phy_interface_t interface,
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const unsigned long *advertising,
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bool permit_pause_to_mac)
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{
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struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
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unsigned int rgc3, sgm_mode, bmcr;
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int advertise, link_timer;
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unsigned int rgc3;
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bool changed;
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bool changed, use_an;
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if (interface == PHY_INTERFACE_MODE_2500BASEX)
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rgc3 = RG_PHY_SPEED_3_125G;
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@ -83,6 +57,37 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
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if (link_timer < 0)
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return link_timer;
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/* Clearing IF_MODE_BIT0 switches the PCS to BASE-X mode, and
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* we assume that fixes it's speed at bitrate = line rate (in
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* other words, 1000Mbps or 2500Mbps).
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*/
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if (interface == PHY_INTERFACE_MODE_SGMII) {
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sgm_mode = SGMII_IF_MODE_SGMII;
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if (phylink_autoneg_inband(mode)) {
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sgm_mode |= SGMII_REMOTE_FAULT_DIS |
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SGMII_SPEED_DUPLEX_AN;
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use_an = true;
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} else {
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use_an = false;
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}
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} else if (phylink_autoneg_inband(mode)) {
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/* 1000base-X or 2500base-X autoneg */
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sgm_mode = SGMII_REMOTE_FAULT_DIS;
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use_an = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
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advertising);
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} else {
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/* 1000base-X or 2500base-X without autoneg */
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sgm_mode = 0;
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use_an = false;
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}
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if (use_an) {
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/* FIXME: Do we need to set AN_RESTART here? */
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bmcr = SGMII_AN_RESTART | SGMII_AN_ENABLE;
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} else {
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bmcr = 0;
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}
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/* Configure the underlying interface speed */
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regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
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RG_PHY_SPEED_3_125G, rgc3);
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@ -94,11 +99,14 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
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/* Setup the link timer and QPHY power up inside SGMIISYS */
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regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER, link_timer / 2 / 8);
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/* Setup SGMIISYS with the determined property */
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if (interface != PHY_INTERFACE_MODE_SGMII)
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mtk_pcs_setup_mode_force(mpcs, interface);
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else if (phylink_autoneg_inband(mode))
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mtk_pcs_setup_mode_an(mpcs);
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/* Update the sgmsys mode register */
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regmap_update_bits(mpcs->regmap, SGMSYS_SGMII_MODE,
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SGMII_REMOTE_FAULT_DIS | SGMII_SPEED_DUPLEX_AN |
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SGMII_IF_MODE_SGMII, sgm_mode);
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/* Update the BMCR */
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regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1,
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SGMII_AN_RESTART | SGMII_AN_ENABLE, bmcr);
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/* Release PHYA power down state */
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regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
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@ -121,8 +129,7 @@ static void mtk_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
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struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
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unsigned int sgm_mode;
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if (!phylink_autoneg_inband(mode) ||
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phy_interface_mode_is_8023z(interface)) {
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if (!phylink_autoneg_inband(mode)) {
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/* Force the speed and duplex setting */
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if (speed == SPEED_10)
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sgm_mode = SGMII_SPEED_10;
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