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https://github.com/Fishwaldo/linux-bl808.git
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Merge branch 'ipa-update-config-data'
Alex Elder says:
====================
net: ipa: update configuration data
Each IPA version has a "data" file defining how various things are
configured. This series gathers a few updates to this information:
- The first patch makes all configuration data constant
- The second fixes an incorrect (but seemingly harmless) value
- The third simplifies things a bit by using implicit zero
initialization for memory regions that are empty
- The fourth adds definitions for memory regions that exist but
are not yet used
- The fifth use configuration data rather than conditional code to
set some bus parameters
====================
This commit is contained in:
David S. Miller
commit
942f0c6e28
5 changed files with 64 additions and 27 deletions
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@ -9,6 +9,14 @@
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#include "ipa_endpoint.h"
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#include "ipa_mem.h"
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/* QSB configuration for the SC7180 SoC. */
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static const struct ipa_qsb_data ipa_qsb_data[] = {
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[IPA_QSB_MASTER_DDR] = {
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.max_writes = 8,
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.max_reads = 12,
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},
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};
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/* Endpoint configuration for the SC7180 SoC. */
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static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
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[IPA_ENDPOINT_AP_COMMAND_TX] = {
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@ -206,7 +214,7 @@ static const struct ipa_mem ipa_mem_local_data[] = {
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[IPA_MEM_UC_INFO] = {
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.offset = 0x0080,
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.size = 0x0200,
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.canary_count = 2,
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.canary_count = 0,
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},
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[IPA_MEM_V4_FILTER_HASHED] = {
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.offset = 0x0288,
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@ -253,11 +261,6 @@ static const struct ipa_mem ipa_mem_local_data[] = {
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.size = 0x0140,
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.canary_count = 2,
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},
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[IPA_MEM_AP_HEADER] = {
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.offset = 0x05e8,
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.size = 0x0000,
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.canary_count = 0,
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},
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[IPA_MEM_MODEM_PROC_CTX] = {
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.offset = 0x05f0,
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.size = 0x0200,
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@ -273,7 +276,7 @@ static const struct ipa_mem ipa_mem_local_data[] = {
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.size = 0x0050,
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.canary_count = 2,
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},
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[IPA_MEM_STATS_QUOTA] = {
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[IPA_MEM_STATS_QUOTA_MODEM] = {
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.offset = 0x0a50,
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.size = 0x0060,
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.canary_count = 2,
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@ -283,11 +286,6 @@ static const struct ipa_mem ipa_mem_local_data[] = {
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.size = 0x0140,
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.canary_count = 0,
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},
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[IPA_MEM_STATS_DROP] = {
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.offset = 0x0bf0,
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.size = 0,
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.canary_count = 0,
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},
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[IPA_MEM_MODEM] = {
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.offset = 0x0bf0,
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.size = 0x140c,
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@ -300,7 +298,7 @@ static const struct ipa_mem ipa_mem_local_data[] = {
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},
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};
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static struct ipa_mem_data ipa_mem_data = {
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static const struct ipa_mem_data ipa_mem_data = {
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.local_count = ARRAY_SIZE(ipa_mem_local_data),
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.local = ipa_mem_local_data,
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.imem_addr = 0x146a8000,
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@ -310,7 +308,7 @@ static struct ipa_mem_data ipa_mem_data = {
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};
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/* Interconnect bandwidths are in 1000 byte/second units */
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static struct ipa_interconnect_data ipa_interconnect_data[] = {
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static const struct ipa_interconnect_data ipa_interconnect_data[] = {
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{
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.name = "memory",
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.peak_bandwidth = 465000, /* 465 MBps */
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@ -329,7 +327,7 @@ static struct ipa_interconnect_data ipa_interconnect_data[] = {
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},
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};
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static struct ipa_clock_data ipa_clock_data = {
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static const struct ipa_clock_data ipa_clock_data = {
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.core_clock_rate = 100 * 1000 * 1000, /* Hz */
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.interconnect_count = ARRAY_SIZE(ipa_interconnect_data),
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.interconnect_data = ipa_interconnect_data,
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@ -338,6 +336,8 @@ static struct ipa_clock_data ipa_clock_data = {
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/* Configuration data for the SC7180 SoC. */
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const struct ipa_data ipa_data_sc7180 = {
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.version = IPA_VERSION_4_2,
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.qsb_count = ARRAY_SIZE(ipa_qsb_data),
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.qsb_data = ipa_qsb_data,
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.endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
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.endpoint_data = ipa_gsi_endpoint_data,
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.resource_data = &ipa_resource_data,
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@ -11,6 +11,18 @@
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#include "ipa_endpoint.h"
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#include "ipa_mem.h"
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/* QSB configuration for the SDM845 SoC. */
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static const struct ipa_qsb_data ipa_qsb_data[] = {
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[IPA_QSB_MASTER_DDR] = {
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.max_writes = 8,
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.max_reads = 8,
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},
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[IPA_QSB_MASTER_PCIE] = {
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.max_writes = 4,
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.max_reads = 12,
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},
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};
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/* Endpoint configuration for the SDM845 SoC. */
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static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = {
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[IPA_ENDPOINT_AP_COMMAND_TX] = {
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@ -293,11 +305,6 @@ static const struct ipa_mem ipa_mem_local_data[] = {
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.size = 0x0140,
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.canary_count = 2,
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},
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[IPA_MEM_AP_HEADER] = {
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.offset = 0x07c8,
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.size = 0x0000,
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.canary_count = 0,
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},
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[IPA_MEM_MODEM_PROC_CTX] = {
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.offset = 0x07d0,
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.size = 0x0200,
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@ -320,7 +327,7 @@ static const struct ipa_mem ipa_mem_local_data[] = {
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},
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};
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static struct ipa_mem_data ipa_mem_data = {
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static const struct ipa_mem_data ipa_mem_data = {
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.local_count = ARRAY_SIZE(ipa_mem_local_data),
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.local = ipa_mem_local_data,
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.imem_addr = 0x146bd000,
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@ -330,7 +337,7 @@ static struct ipa_mem_data ipa_mem_data = {
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};
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/* Interconnect bandwidths are in 1000 byte/second units */
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static struct ipa_interconnect_data ipa_interconnect_data[] = {
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static const struct ipa_interconnect_data ipa_interconnect_data[] = {
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{
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.name = "memory",
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.peak_bandwidth = 600000, /* 600 MBps */
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@ -349,7 +356,7 @@ static struct ipa_interconnect_data ipa_interconnect_data[] = {
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},
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};
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static struct ipa_clock_data ipa_clock_data = {
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static const struct ipa_clock_data ipa_clock_data = {
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.core_clock_rate = 75 * 1000 * 1000, /* Hz */
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.interconnect_count = ARRAY_SIZE(ipa_interconnect_data),
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.interconnect_data = ipa_interconnect_data,
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@ -358,6 +365,8 @@ static struct ipa_clock_data ipa_clock_data = {
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/* Configuration data for the SDM845 SoC. */
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const struct ipa_data ipa_data_sdm845 = {
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.version = IPA_VERSION_3_5_1,
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.qsb_count = ARRAY_SIZE(ipa_qsb_data),
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.qsb_data = ipa_qsb_data,
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.endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),
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.endpoint_data = ipa_gsi_endpoint_data,
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.resource_data = &ipa_resource_data,
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@ -49,6 +49,22 @@
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#define IPA_RESOURCE_GROUP_SRC_MAX 5
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#define IPA_RESOURCE_GROUP_DST_MAX 5
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/** enum ipa_qsb_master_id - array index for IPA QSB configuration data */
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enum ipa_qsb_master_id {
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IPA_QSB_MASTER_DDR,
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IPA_QSB_MASTER_PCIE,
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};
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/**
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* struct ipa_qsb_data - Qualcomm System Bus configuration data
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* @max_writes: Maximum outstanding write requests for this master
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* @max_reads: Maximum outstanding read requests for this master
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*/
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struct ipa_qsb_data {
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u8 max_writes;
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u8 max_reads;
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};
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/**
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* struct gsi_channel_data - GSI channel configuration data
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* @tre_count: number of TREs in the channel ring
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@ -285,14 +301,18 @@ struct ipa_clock_data {
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/**
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* struct ipa_data - combined IPA/GSI configuration data
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* @version: IPA hardware version
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* @endpoint_count: number of entries in endpoint_data array
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* @qsb_count: number of entries in the qsb_data array
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* @qsb_data: Qualcomm System Bus configuration data
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* @endpoint_count: number of entries in the endpoint_data array
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* @endpoint_data: IPA endpoint/GSI channel data
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* @resource_data: IPA resource configuration data
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* @mem_count: number of entries in mem_data array
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* @mem_count: number of entries in the mem_data array
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* @mem_data: IPA-local shared memory region data
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*/
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struct ipa_data {
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enum ipa_version version;
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u32 qsb_count; /* # entries in qsb_data[] */
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const struct ipa_qsb_data *qsb_data;
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u32 endpoint_count; /* # entries in endpoint_data[] */
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const struct ipa_gsi_endpoint_data *endpoint_data;
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const struct ipa_resource_data *resource_data;
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@ -28,6 +28,7 @@ struct ipa_mem_data;
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* The set of memory regions is defined in configuration data. They are
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* subject to these constraints:
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* - a zero offset and zero size represents and undefined region
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* - a region's size does not include space for its "canary" values
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* - a region's offset is defined to be *past* all "canary" values
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* - offset must be large enough to account for all canaries
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* - a region's size may be zero, but may still have canaries
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@ -56,9 +57,16 @@ enum ipa_mem_id {
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IPA_MEM_AP_HEADER, /* 0 canaries */
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IPA_MEM_MODEM_PROC_CTX, /* 2 canaries */
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IPA_MEM_AP_PROC_CTX, /* 0 canaries */
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IPA_MEM_NAT_TABLE, /* 4 canaries (IPA v4.5 and above) */
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IPA_MEM_PDN_CONFIG, /* 2 canaries (IPA v4.0 and above) */
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IPA_MEM_STATS_QUOTA, /* 2 canaries (IPA v4.0 and above) */
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IPA_MEM_STATS_QUOTA_MODEM, /* 2 canaries (IPA v4.0 and above) */
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IPA_MEM_STATS_QUOTA_AP, /* 0 canaries (IPA v4.0 and above) */
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IPA_MEM_STATS_TETHERING, /* 0 canaries (IPA v4.0 and above) */
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IPA_MEM_STATS_V4_FILTER, /* 0 canaries (IPA v4.0-v4.2) */
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IPA_MEM_STATS_V6_FILTER, /* 0 canaries (IPA v4.0-v4.2) */
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IPA_MEM_STATS_V4_ROUTE, /* 0 canaries (IPA v4.0-v4.2) */
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IPA_MEM_STATS_V6_ROUTE, /* 0 canaries (IPA v4.0-v4.2) */
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IPA_MEM_STATS_FILTER_ROUTE, /* 0 canaries (IPA v4.5 and above) */
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IPA_MEM_STATS_DROP, /* 0 canaries (IPA v4.0 and above) */
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IPA_MEM_MODEM, /* 0 canaries */
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IPA_MEM_UC_EVENT_RING, /* 1 canary */
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@ -378,7 +378,7 @@ init_modem_driver_req(struct ipa_qmi *ipa_qmi)
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/* None of the stats fields are valid (IPA v4.0 and above) */
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if (ipa->version != IPA_VERSION_3_5_1) {
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mem = &ipa->mem[IPA_MEM_STATS_QUOTA];
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mem = &ipa->mem[IPA_MEM_STATS_QUOTA_MODEM];
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if (mem->size) {
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req.hw_stats_quota_base_addr_valid = 1;
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req.hw_stats_quota_base_addr =
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