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Char/Misc driver changes for 6.2-rc1

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Here is the large set of char/misc and other driver subsystem changes
 for 6.2-rc1.  Nothing earth-shattering in here at all, just a lot of new
 driver development and minor fixes.  Highlights include:
  - fastrpc driver updates
  - iio new drivers and updates
  - habanalabs driver updates for new hardware and features
  - slimbus driver updates
  - speakup module parameters added to aid in boot time configuration
  - i2c probe_new conversions for lots of different drivers
  - other small driver fixes and additions
 
 One semi-interesting change in here is the increase of the number of
 misc dynamic minors available to 1048448 to handle new huge-cpu systems.
 
 All of these have been in linux-next for a while with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the large set of char/misc and other driver subsystem changes
  for 6.2-rc1. Nothing earth-shattering in here at all, just a lot of
  new driver development and minor fixes.

  Highlights include:

   - fastrpc driver updates

   - iio new drivers and updates

   - habanalabs driver updates for new hardware and features

   - slimbus driver updates

   - speakup module parameters added to aid in boot time configuration

   - i2c probe_new conversions for lots of different drivers

   - other small driver fixes and additions

  One semi-interesting change in here is the increase of the number of
  misc dynamic minors available to 1048448 to handle new huge-cpu
  systems.

  All of these have been in linux-next for a while with no reported
  problems"

* tag 'char-misc-6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (521 commits)
  extcon: usbc-tusb320: Convert to i2c's .probe_new()
  extcon: rt8973: Convert to i2c's .probe_new()
  extcon: fsa9480: Convert to i2c's .probe_new()
  extcon: max77843: Replace irqchip mask_invert with unmask_base
  chardev: fix error handling in cdev_device_add()
  mcb: mcb-parse: fix error handing in chameleon_parse_gdd()
  drivers: mcb: fix resource leak in mcb_probe()
  coresight: etm4x: fix repeated words in comments
  coresight: cti: Fix null pointer error on CTI init before ETM
  coresight: trbe: remove cpuhp instance node before remove cpuhp state
  counter: stm32-lptimer-cnt: fix the check on arr and cmp registers update
  misc: fastrpc: Add dma_mask to fastrpc_channel_ctx
  misc: fastrpc: Add mmap request assigning for static PD pool
  misc: fastrpc: Safekeep mmaps on interrupted invoke
  misc: fastrpc: Add support for audiopd
  misc: fastrpc: Rework fastrpc_req_munmap
  misc: fastrpc: Use fastrpc_map_put in fastrpc_map_create on fail
  misc: fastrpc: Add fastrpc_remote_heap_alloc
  misc: fastrpc: Add reserved mem support
  misc: fastrpc: Rename audio protection domain to root
  ...
This commit is contained in:
Linus Torvalds 2022-12-16 03:49:24 -08:00
commit ba54ff1fb6
463 changed files with 18068 additions and 3073 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

9
Documentation/ABI/stable/sysfs-driver-speakup
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@ -35,6 +35,15 @@ Description: This controls cursor delay when using arrow keys. When a
characters. Set this to a higher value to adjust for the delay characters. Set this to a higher value to adjust for the delay
and better synchronisation between cursor position and speech. and better synchronisation between cursor position and speech.
What: /sys/accessibility/speakup/cur_phonetic
KernelVersion: 6.2
Contact: speakup@linux-speakup.org
Description: This allows speakup to speak letters phoneticaly when arrowing through
a word letter by letter. This doesn't affect the spelling when typing
the characters. When cur_phonetic=1, speakup will speak characters
phoneticaly when arrowing over a letter. When cur_phonetic=0, speakup
will speak letters as normally.
What: /sys/accessibility/speakup/delimiters What: /sys/accessibility/speakup/delimiters
KernelVersion: 2.6 KernelVersion: 2.6
Contact: speakup@linux-speakup.org Contact: speakup@linux-speakup.org

7
Documentation/ABI/testing/debugfs-driver-habanalabs
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@ -91,6 +91,13 @@ Description: Enables the root user to set the device to specific state.
Valid values are "disable", "enable", "suspend", "resume". Valid values are "disable", "enable", "suspend", "resume".
User can read this property to see the valid values User can read this property to see the valid values
What: /sys/kernel/debug/habanalabs/hl<n>/device_release_watchdog_timeout
Date: Oct 2022
KernelVersion: 6.2
Contact: ttayar@habana.ai
Description: The watchdog timeout value in seconds for a device relese upon
certain error cases, after which the device is reset.
What: /sys/kernel/debug/habanalabs/hl<n>/dma_size What: /sys/kernel/debug/habanalabs/hl<n>/dma_size
Date: Apr 2021 Date: Apr 2021
KernelVersion: 5.13 KernelVersion: 5.13

45
Documentation/ABI/testing/sysfs-bus-coreboot Normal file
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@ -0,0 +1,45 @@
What: /sys/bus/coreboot
Date: August 2022
Contact: Jack Rosenthal <jrosenth@chromium.org>
Description:
The coreboot bus provides a variety of virtual devices used to
access data structures created by the Coreboot BIOS.
What: /sys/bus/coreboot/devices/cbmem-<id>
Date: August 2022
Contact: Jack Rosenthal <jrosenth@chromium.org>
Description:
CBMEM is a downwards-growing memory region created by Coreboot,
and contains tagged data structures to be shared with payloads
in the boot process and the OS. Each CBMEM entry is given a
directory in /sys/bus/coreboot/devices based on its id.
A list of ids known to Coreboot can be found in the coreboot
source tree at
``src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h``.
What: /sys/bus/coreboot/devices/cbmem-<id>/address
Date: August 2022
Contact: Jack Rosenthal <jrosenth@chromium.org>
Description:
This is the pyhsical memory address that the CBMEM entry's data
begins at, in hexadecimal (e.g., ``0x76ffe000``).
What: /sys/bus/coreboot/devices/cbmem-<id>/size
Date: August 2022
Contact: Jack Rosenthal <jrosenth@chromium.org>
Description:
This is the size of the CBMEM entry's data, in hexadecimal
(e.g., ``0x1234``).
What: /sys/bus/coreboot/devices/cbmem-<id>/mem
Date: August 2022
Contact: Jack Rosenthal <jrosenth@chromium.org>
Description:
A file exposing read/write access to the entry's data. Note
that this file does not support mmap(), as coreboot
does not guarantee that the data will be page-aligned.
The mode of this file is 0600. While there shouldn't be
anything security-sensitive contained in CBMEM, read access
requires root privileges given this is exposing a small subset
of physical memory.

46
Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130 Normal file
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@ -0,0 +1,46 @@
What: /sys/bus/iio/devices/iio:deviceX/in_voltage-voltage_filter_mode_available
KernelVersion: 6.2
Contact: linux-iio@vger.kernel.org
Description:
Reading returns a list with the possible filter modes.
* "sinc4" - Sinc 4. Excellent noise performance. Long
1st conversion time. No natural 50/60Hz rejection.
* "sinc4+sinc1" - Sinc4 + averaging by 8. Low 1st conversion
time.
* "sinc3" - Sinc3. Moderate 1st conversion time.
Good noise performance.
* "sinc3+rej60" - Sinc3 + 60Hz rejection. At a sampling
frequency of 50Hz, achieves simultaneous 50Hz and 60Hz
rejection.
* "sinc3+sinc1" - Sinc3 + averaging by 8. Low 1st conversion
time. Best used with a sampling frequency of at least
216.19Hz.
* "sinc3+pf1" - Sinc3 + Post Filter 1. 53dB rejection @
50Hz, 58dB rejection @ 60Hz.
* "sinc3+pf2" - Sinc3 + Post Filter 2. 70dB rejection @
50Hz, 70dB rejection @ 60Hz.
* "sinc3+pf3" - Sinc3 + Post Filter 3. 99dB rejection @
50Hz, 103dB rejection @ 60Hz.
* "sinc3+pf4" - Sinc3 + Post Filter 4. 103dB rejection @
50Hz, 109dB rejection @ 60Hz.
What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_filter_mode
KernelVersion: 6.2
Contact: linux-iio@vger.kernel.org
Description:
Set the filter mode of the differential channel. When the filter
mode changes, the in_voltageY-voltageZ_sampling_frequency and
in_voltageY-voltageZ_sampling_frequency_available attributes
might also change to accommodate the new filter mode.
If the current sampling frequency is out of range for the new
filter mode, the sampling frequency will be changed to the
closest valid one.

13
Documentation/ABI/testing/sysfs-bus-iio-adc-max11410 Normal file
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@ -0,0 +1,13 @@
What: /sys/bus/iio/devices/iio:deviceX/in_voltage_filterY_notch_en
Date: September 2022
KernelVersion: 6.0
Contact: linux-iio@vger.kernel.org
Description:
Enable or disable a notch filter.
What: /sys/bus/iio/devices/iio:deviceX/in_voltage_filterY_notch_center
Date: September 2022
KernelVersion: 6.0
Contact: linux-iio@vger.kernel.org
Description:
Center frequency of the notch filter in Hz.

312
Documentation/ABI/testing/sysfs-bus-platform-devices-ampere-smpro Normal file
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@ -0,0 +1,312 @@
What: /sys/bus/platform/devices/smpro-errmon.*/error_[core|mem|pcie|other]_[ce|ue]
KernelVersion: 6.1
Contact: Quan Nguyen <quan@os.amperecomputing.com>
Description:
(RO) Contains the 48-byte Ampere (Vendor-Specific) Error Record printed
in hex format according to the table below:
+--------+---------------+-------------+------------------------------------------------------------+
| Offset | Field | Size (byte) | Description |
+--------+---------------+-------------+------------------------------------------------------------+
| 00 | Error Type | 1 | See :ref:`the table below <smpro-error-types>` for details |
+--------+---------------+-------------+------------------------------------------------------------+
| 01 | Subtype | 1 | See :ref:`the table below <smpro-error-types>` for details |
+--------+---------------+-------------+------------------------------------------------------------+
| 02 | Instance | 2 | See :ref:`the table below <smpro-error-types>` for details |
+--------+---------------+-------------+------------------------------------------------------------+
| 04 | Error status | 4 | See ARM RAS specification for details |
+--------+---------------+-------------+------------------------------------------------------------+
| 08 | Error Address | 8 | See ARM RAS specification for details |
+--------+---------------+-------------+------------------------------------------------------------+
| 16 | Error Misc 0 | 8 | See ARM RAS specification for details |
+--------+---------------+-------------+------------------------------------------------------------+
| 24 | Error Misc 1 | 8 | See ARM RAS specification for details |
+--------+---------------+-------------+------------------------------------------------------------+
| 32 | Error Misc 2 | 8 | See ARM RAS specification for details |
+--------+---------------+-------------+------------------------------------------------------------+
| 40 | Error Misc 3 | 8 | See ARM RAS specification for details |
+--------+---------------+-------------+------------------------------------------------------------+
The table below defines the value of error types, their subtype, subcomponent and instance:
.. _smpro-error-types:
+-----------------+------------+----------+----------------+----------------------------------------+
| Error Group | Error Type | Sub type | Sub component | Instance |
+-----------------+------------+----------+----------------+----------------------------------------+
| CPM (core) | 0 | 0 | Snoop-Logic | CPM # |
+-----------------+------------+----------+----------------+----------------------------------------+
| CPM (core) | 0 | 2 | Armv8 Core 1 | CPM # |
+-----------------+------------+----------+----------------+----------------------------------------+
| MCU (mem) | 1 | 1 | ERR1 | MCU # \| SLOT << 11 |
+-----------------+------------+----------+----------------+----------------------------------------+
| MCU (mem) | 1 | 2 | ERR2 | MCU # \| SLOT << 11 |
+-----------------+------------+----------+----------------+----------------------------------------+
| MCU (mem) | 1 | 3 | ERR3 | MCU # |
+-----------------+------------+----------+----------------+----------------------------------------+
| MCU (mem) | 1 | 4 | ERR4 | MCU # |
+-----------------+------------+----------+----------------+----------------------------------------+
| MCU (mem) | 1 | 5 | ERR5 | MCU # |
+-----------------+------------+----------+----------------+----------------------------------------+
| MCU (mem) | 1 | 6 | ERR6 | MCU # |
+-----------------+------------+----------+----------------+----------------------------------------+
| MCU (mem) | 1 | 7 | Link Error | MCU # |
+-----------------+------------+----------+----------------+----------------------------------------+
| Mesh (other) | 2 | 0 | Cross Point | X \| (Y << 5) \| NS <<11 |
+-----------------+------------+----------+----------------+----------------------------------------+
| Mesh (other) | 2 | 1 | Home Node(IO) | X \| (Y << 5) \| NS <<11 |
+-----------------+------------+----------+----------------+----------------------------------------+
| Mesh (other) | 2 | 2 | Home Node(Mem) | X \| (Y << 5) \| NS <<11 \| device<<12 |
+-----------------+------------+----------+----------------+----------------------------------------+
| Mesh (other) | 2 | 4 | CCIX Node | X \| (Y << 5) \| NS <<11 |
+-----------------+------------+----------+----------------+----------------------------------------+
| 2P Link (other) | 3 | 0 | N/A | Altra 2P Link # |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 0 | ERR0 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 1 | ERR1 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 2 | ERR2 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 3 | ERR3 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 4 | ERR4 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 5 | ERR5 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 6 | ERR6 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 7 | ERR7 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 8 | ERR8 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 9 | ERR9 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 10 | ERR10 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 11 | ERR11 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 12 | ERR12 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| GIC (other) | 5 | 13-21 | ERR13 | RC # + 1 |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TCU | 100 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU0 | 0 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU1 | 1 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU2 | 2 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU3 | 3 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU4 | 4 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU5 | 5 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU6 | 6 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU7 | 7 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU8 | 8 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMMU (other) | 6 | TBU9 | 9 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| PCIe AER (pcie) | 7 | Root | 0 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| PCIe AER (pcie) | 7 | Device | 1 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| PCIe RC (pcie) | 8 | RCA HB | 0 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| PCIe RC (pcie) | 8 | RCB HB | 1 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| PCIe RC (pcie) | 8 | RASDP | 8 | RC # |
+-----------------+------------+----------+----------------+----------------------------------------+
| OCM (other) | 9 | ERR0 | 0 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| OCM (other) | 9 | ERR1 | 1 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| OCM (other) | 9 | ERR2 | 2 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMpro (other) | 10 | ERR0 | 0 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMpro (other) | 10 | ERR1 | 1 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| SMpro (other) | 10 | MPA_ERR | 2 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| PMpro (other) | 11 | ERR0 | 0 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| PMpro (other) | 11 | ERR1 | 1 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
| PMpro (other) | 11 | MPA_ERR | 2 | 0 |
+-----------------+------------+----------+----------------+----------------------------------------+
Example::
# cat error_other_ue
880807001e004010401040101500000001004010401040100c0000000000000000000000000000000000000000000000
The detail of each sysfs entries is as below:
+-------------+---------------------------------------------------------+----------------------------------+
| Error | Sysfs entry | Description (when triggered) |
+-------------+---------------------------------------------------------+----------------------------------+
| Core's CE | /sys/bus/platform/devices/smpro-errmon.*/error_core_ce | Core has CE error |
+-------------+---------------------------------------------------------+----------------------------------+
| Core's UE | /sys/bus/platform/devices/smpro-errmon.*/error_core_ue | Core has UE error |
+-------------+---------------------------------------------------------+----------------------------------+
| Memory's CE | /sys/bus/platform/devices/smpro-errmon.*/error_mem_ce | Memory has CE error |
+-------------+---------------------------------------------------------+----------------------------------+
| Memory's UE | /sys/bus/platform/devices/smpro-errmon.*/error_mem_ue | Memory has UE error |
+-------------+---------------------------------------------------------+----------------------------------+
| PCIe's CE | /sys/bus/platform/devices/smpro-errmon.*/error_pcie_ce | any PCIe controller has CE error |
+-------------+---------------------------------------------------------+----------------------------------+
| PCIe's UE | /sys/bus/platform/devices/smpro-errmon.*/error_pcie_ue | any PCIe controller has UE error |
+-------------+---------------------------------------------------------+----------------------------------+
| Other's CE | /sys/bus/platform/devices/smpro-errmon.*/error_other_ce | any other CE error |
+-------------+---------------------------------------------------------+----------------------------------+
| Other's UE | /sys/bus/platform/devices/smpro-errmon.*/error_other_ue | any other UE error |
+-------------+---------------------------------------------------------+----------------------------------+
UE: Uncorrect-able Error
CE: Correct-able Error
For details, see section `3.3 Ampere (Vendor-Specific) Error Record Formats,
Altra Family RAS Supplement`.
What: /sys/bus/platform/devices/smpro-errmon.*/overflow_[core|mem|pcie|other]_[ce|ue]
KernelVersion: 6.1
Contact: Quan Nguyen <quan@os.amperecomputing.com>
Description:
(RO) Return the overflow status of each type HW error reported:
- 0 : No overflow
- 1 : There is an overflow and the oldest HW errors are dropped
The detail of each sysfs entries is as below:
+-------------+-----------------------------------------------------------+---------------------------------------+
| Overflow | Sysfs entry | Description |
+-------------+-----------------------------------------------------------+---------------------------------------+
| Core's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_core_ce | Core CE error overflow |
+-------------+-----------------------------------------------------------+---------------------------------------+
| Core's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_core_ue | Core UE error overflow |
+-------------+-----------------------------------------------------------+---------------------------------------+
| Memory's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_mem_ce | Memory CE error overflow |
+-------------+-----------------------------------------------------------+---------------------------------------+
| Memory's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_mem_ue | Memory UE error overflow |
+-------------+-----------------------------------------------------------+---------------------------------------+
| PCIe's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_pcie_ce | any PCIe controller CE error overflow |
+-------------+-----------------------------------------------------------+---------------------------------------+
| PCIe's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_pcie_ue | any PCIe controller UE error overflow |
+-------------+-----------------------------------------------------------+---------------------------------------+
| Other's CE | /sys/bus/platform/devices/smpro-errmon.*/overflow_other_ce| any other CE error overflow |
+-------------+-----------------------------------------------------------+---------------------------------------+
| Other's UE | /sys/bus/platform/devices/smpro-errmon.*/overflow_other_ue| other UE error overflow |
+-------------+-----------------------------------------------------------+---------------------------------------+
where:
- UE: Uncorrect-able Error
- CE: Correct-able Error
What: /sys/bus/platform/devices/smpro-errmon.*/[error|warn]_[smpro|pmpro]
KernelVersion: 6.1
Contact: Quan Nguyen <quan@os.amperecomputing.com>
Description:
(RO) Contains the internal firmware error/warning printed as hex format.
The detail of each sysfs entries is as below:
+---------------+------------------------------------------------------+--------------------------+
| Error | Sysfs entry | Description |
+---------------+------------------------------------------------------+--------------------------+
| SMpro error | /sys/bus/platform/devices/smpro-errmon.*/error_smpro | system has SMpro error |
+---------------+------------------------------------------------------+--------------------------+
| SMpro warning | /sys/bus/platform/devices/smpro-errmon.*/warn_smpro | system has SMpro warning |
+---------------+------------------------------------------------------+--------------------------+
| PMpro error | /sys/bus/platform/devices/smpro-errmon.*/error_pmpro | system has PMpro error |
+---------------+------------------------------------------------------+--------------------------+
| PMpro warning | /sys/bus/platform/devices/smpro-errmon.*/warn_pmpro | system has PMpro warning |
+---------------+------------------------------------------------------+--------------------------+
For details, see section `5.10 RAS Internal Error Register Definitions,
Altra Family Soc BMC Interface Specification`.
What: /sys/bus/platform/devices/smpro-errmon.*/event_[vrd_warn_fault|vrd_hot|dimm_hot]
KernelVersion: 6.1
Contact: Quan Nguyen <quan@os.amperecomputing.com>
Description:
(RO) Contains the detail information in case of VRD/DIMM warning/hot events
in hex format as below::
AAAA
where:
- ``AAAA``: The event detail information data
The detail of each sysfs entries is as below:
+---------------+---------------------------------------------------------------+---------------------+
| Event | Sysfs entry | Description |
+---------------+---------------------------------------------------------------+---------------------+
| VRD HOT | /sys/bus/platform/devices/smpro-errmon.*/event_vrd_hot | VRD Hot |
+---------------+---------------------------------------------------------------+---------------------+
| VR Warn/Fault | /sys/bus/platform/devices/smpro-errmon.*/event_vrd_warn_fault | VR Warning or Fault |
+---------------+---------------------------------------------------------------+---------------------+
| DIMM HOT | /sys/bus/platform/devices/smpro-errmon.*/event_dimm_hot | DIMM Hot |
+---------------+---------------------------------------------------------------+---------------------+
For more details, see section `5.7 GPI Status Registers,
Altra Family Soc BMC Interface Specification`.
What: /sys/bus/platform/devices/smpro-misc.*/boot_progress
KernelVersion: 6.1
Contact: Quan Nguyen <quan@os.amperecomputing.com>
Description:
(RO) Contains the boot stages information in hex as format below::
AABBCCCCCCCC
where:
- ``AA`` : The boot stages
- 00: SMpro firmware booting
- 01: PMpro firmware booting
- 02: ATF BL1 firmware booting
- 03: DDR initialization
- 04: DDR training report status
- 05: ATF BL2 firmware booting
- 06: ATF BL31 firmware booting
- 07: ATF BL32 firmware booting
- 08: UEFI firmware booting
- 09: OS booting
- ``BB`` : Boot status
- 00: Not started
- 01: Started
- 02: Completed without error
- 03: Failed.
- ``CCCCCCCC``: Boot status information defined for each boot stages
For details, see section `5.11 Boot Stage Register Definitions`
and section `6. Processor Boot Progress Codes, Altra Family Soc BMC
Interface Specification`.
What: /sys/bus/platform/devices/smpro-misc*/soc_power_limit
KernelVersion: 6.1
Contact: Quan Nguyen <quan@os.amperecomputing.com>
Description:
(RW) Contains the desired SoC power limit in Watt.
Writes to this sysfs set the desired SoC power limit (W).
Reads from this register return the current SoC power limit (W).
The value ranges:
- Minimum: 120 W
- Maximum: Socket TDP power

232
Documentation/devicetree/bindings/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml Normal file
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@ -0,0 +1,232 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX8qxp Pixel Link Medium Speed Interconnect (MSI) Bus
maintainers:
- Liu Ying <victor.liu@nxp.com>
description: |
i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os
sitting together with the PHYs. It is not the same as the MSI bus coming
from i.MX8 System Controller Unit (SCU) which is used to control power,
clock and reset through the i.MX8 Distributed Slave System Controller (DSC).
i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
that is, MSI clock and AHB clock, need to be enabled so that peripherals
connected to the bus can be accessed. Also, the bus is part of a power
domain. The power domain needs to be enabled before the peripherals can
be accessed.
Peripherals in i.MX8qm/qxp imaging, LVDS, MIPI DSI and HDMI TX subsystems,
like I2C controller, PWM controller, MIPI DSI controller and Control and
Status Registers (CSR) module, are accessed through the bus.
The i.MX System Controller Firmware (SCFW) owns and uses the i.MX8qm/qxp
pixel link MSI bus controller and does not allow SCFW user to control it.
So, the controller's registers cannot be accessed by SCFW user. Hence,
the interrupts generated by the controller don't make any sense from SCFW
user's point of view.
allOf:
- $ref: simple-pm-bus.yaml#
# We need a select here so we don't match all nodes with 'simple-pm-bus'.
select:
properties:
compatible:
contains:
enum:
- fsl,imx8qxp-display-pixel-link-msi-bus
- fsl,imx8qm-display-pixel-link-msi-bus
required:
- compatible
properties:
compatible:
items:
- enum:
- fsl,imx8qxp-display-pixel-link-msi-bus
- fsl,imx8qm-display-pixel-link-msi-bus
- const: simple-pm-bus
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: master gated clock from system
- description: AHB clock
clock-names:
items:
- const: msi
- const: ahb
patternProperties:
"^.*@[0-9a-f]+$":
description: Devices attached to the bus
type: object
properties:
reg:
maxItems: 1
required:
- reg
required:
- compatible
- reg
- clocks
- clock-names
- power-domains
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/imx8-lpcg.h>
#include <dt-bindings/firmware/imx/rsrc.h>
bus@56200000 {
compatible = "fsl,imx8qxp-display-pixel-link-msi-bus", "simple-pm-bus";
reg = <0x56200000 0x20000>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&dc0_irqsteer>;
interrupts = <320>;
ranges;
clocks = <&dc0_disp_ctrl_link_mst0_lpcg IMX_LPCG_CLK_4>,
<&dc0_disp_ctrl_link_mst0_lpcg IMX_LPCG_CLK_4>;
clock-names = "msi", "ahb";
power-domains = <&pd IMX_SC_R_DC_0>;
syscon@56221000 {
compatible = "fsl,imx8qxp-mipi-lvds-csr", "syscon", "simple-mfd";
reg = <0x56221000 0x1000>;
clocks = <&mipi_lvds_0_di_mipi_lvds_regs_lpcg IMX_LPCG_CLK_4>;
clock-names = "ipg";
pxl2dpi {
compatible = "fsl,imx8qxp-pxl2dpi";
fsl,sc-resource = <IMX_SC_R_MIPI_0>;
power-domains = <&pd IMX_SC_R_MIPI_0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
mipi_lvds_0_pxl2dpi_dc0_pixel_link0: endpoint@0 {
reg = <0>;
remote-endpoint = <&dc0_pixel_link0_mipi_lvds_0_pxl2dpi>;
};
mipi_lvds_0_pxl2dpi_dc0_pixel_link1: endpoint@1 {
reg = <1>;
remote-endpoint = <&dc0_pixel_link1_mipi_lvds_0_pxl2dpi>;
};
};
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi>;
};
mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1: endpoint@1 {
reg = <1>;
remote-endpoint = <&mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi>;
};
};
};
};
ldb {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx8qxp-ldb";
clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>,
<&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>;
clock-names = "pixel", "bypass";
power-domains = <&pd IMX_SC_R_LVDS_0>;
channel@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
phys = <&mipi_lvds_0_phy>;
phy-names = "lvds_phy";
port@0 {
reg = <0>;
mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint {
remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0>;
};
};
port@1 {
reg = <1>;
/* ... */
};
};
channel@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
phys = <&mipi_lvds_0_phy>;
phy-names = "lvds_phy";
port@0 {
reg = <0>;
mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint {
remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1>;
};
};
port@1 {
reg = <1>;
/* ... */
};
};
};
};
clock-controller@56223004 {
compatible = "fsl,imx8qxp-lpcg";
reg = <0x56223004 0x4>;
#clock-cells = <1>;
clocks = <&mipi_lvds_0_ipg_clk>;
clock-indices = <IMX_LPCG_CLK_4>;
clock-output-names = "mipi_lvds_0_di_mipi_lvds_regs_lpcg_ipg_clk";
power-domains = <&pd IMX_SC_R_MIPI_0>;
};
phy@56228300 {
compatible = "fsl,imx8qxp-mipi-dphy";
reg = <0x56228300 0x100>;
clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_PHY>;
clock-names = "phy_ref";
#phy-cells = <0>;
fsl,syscon = <&mipi_lvds_0_csr>;
power-domains = <&pd IMX_SC_R_MIPI_0>;
};
};

5
Documentation/devicetree/bindings/eeprom/at24.yaml
View file

@ -10,6 +10,9 @@ title: I2C EEPROMs compatible with Atmel's AT24
maintainers: maintainers:
- Bartosz Golaszewski <bgolaszewski@baylibre.com> - Bartosz Golaszewski <bgolaszewski@baylibre.com>
allOf:
- $ref: /schemas/nvmem/nvmem.yaml
select: select:
properties: properties:
compatible: compatible:
@ -183,7 +186,7 @@ required:
- compatible - compatible
- reg - reg
additionalProperties: false unevaluatedProperties: false
examples: examples:
- | - |

1
Documentation/devicetree/bindings/eeprom/at25.yaml
View file

@ -104,6 +104,7 @@ required:
allOf: allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml# - $ref: /schemas/spi/spi-peripheral-props.yaml#
- $ref: /schemas/nvmem/nvmem.yaml
- if: - if:
properties: properties:
compatible: compatible:

1
Documentation/devicetree/bindings/eeprom/microchip,93lc46b.yaml
View file

@ -47,6 +47,7 @@ required:
allOf: allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml# - $ref: /schemas/spi/spi-peripheral-props.yaml#
- $ref: /schemas/nvmem/nvmem.yaml
unevaluatedProperties: false unevaluatedProperties: false

81
Documentation/devicetree/bindings/fpga/lattice,sysconfig.yaml Normal file
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@ -0,0 +1,81 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/fpga/lattice,sysconfig.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Lattice Slave SPI sysCONFIG FPGA manager
maintainers:
- Ivan Bornyakov <i.bornyakov@metrotek.ru>
description: |
Lattice sysCONFIG port, which is used for FPGA configuration, among others,
have Slave Serial Peripheral Interface. Only full reconfiguration is
supported.
Programming of ECP5 is done by writing uncompressed bitstream image in .bit
format into FPGA's SRAM configuration memory.
properties:
compatible:
enum:
- lattice,sysconfig-ecp5
reg:
maxItems: 1
program-gpios:
description:
A GPIO line connected to PROGRAMN (active low) pin of the device.
Initiates configuration sequence.
maxItems: 1
init-gpios:
description:
A GPIO line connected to INITN (active low) pin of the device.
Indicates that the FPGA is ready to be configured.
maxItems: 1
done-gpios:
description:
A GPIO line connected to DONE (active high) pin of the device.
Indicates that the configuration sequence is complete.
maxItems: 1
required:
- compatible
- reg
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml
- if:
properties:
compatible:
contains:
const: lattice,sysconfig-ecp5
then:
properties:
spi-max-frequency:
maximum: 60000000
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
fpga-mgr@0 {
compatible = "lattice,sysconfig-ecp5";
reg = <0>;
spi-max-frequency = <20000000>;
program-gpios = <&gpio3 4 GPIO_ACTIVE_LOW>;
init-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
done-gpios = <&gpio3 2 GPIO_ACTIVE_HIGH>;
};
};

8
Documentation/devicetree/bindings/iio/accel/adi,adxl355.yaml
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@ -4,20 +4,22 @@
$id: http://devicetree.org/schemas/iio/accel/adi,adxl355.yaml# $id: http://devicetree.org/schemas/iio/accel/adi,adxl355.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices ADXL355 3-Axis, Low noise MEMS Accelerometer title: Analog Devices ADXL355 and ADXL359 3-Axis, Low noise MEMS Accelerometers
maintainers: maintainers:
- Puranjay Mohan <puranjay12@gmail.com> - Puranjay Mohan <puranjay12@gmail.com>
description: | description: |
Analog Devices ADXL355 3-Axis, Low noise MEMS Accelerometer that supports Analog Devices ADXL355 and ADXL359 3-Axis, Low noise MEMS Accelerometers that
both I2C & SPI interfaces support both I2C & SPI interfaces
https://www.analog.com/en/products/adxl355.html https://www.analog.com/en/products/adxl355.html
https://www.analog.com/en/products/adxl359.html
properties: properties:
compatible: compatible:
enum: enum:
- adi,adxl355 - adi,adxl355
- adi,adxl359
reg: reg:
maxItems: 1 maxItems: 1

65
Documentation/devicetree/bindings/iio/accel/kionix,kx022a.yaml Normal file
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@ -0,0 +1,65 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/accel/kionix,kx022a.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ROHM/Kionix KX022A Accelerometer
maintainers:
- Matti Vaittinen <mazziesaccount@gmail.com>
description: |
KX022A is a 3-axis accelerometer supporting +/- 2G, 4G, 8G and 16G ranges,
output data-rates from 0.78Hz to 1600Hz and a hardware-fifo buffering.
KX022A can be accessed either via I2C or SPI.
properties:
compatible:
const: kionix,kx022a
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 2
interrupt-names:
minItems: 1
items:
- enum: [INT1, INT2]
- const: INT2
vdd-supply: true
io-vdd-supply: true
mount-matrix:
description: |
an optional 3x3 mounting rotation matrix.
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
accel@1f {
compatible = "kionix,kx022a";
reg = <0x1f>;
interrupt-parent = <&gpio1>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "INT1";
io-vdd-supply = <&iovdd>;
vdd-supply = <&vdd>;
};
};

262
Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml Normal file
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@ -0,0 +1,262 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2022 Analog Devices Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,ad4130.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD4130 ADC device driver
maintainers:
- Cosmin Tanislav <cosmin.tanislav@analog.com>
description: |
Bindings for the Analog Devices AD4130 ADC. Datasheet can be found here:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD4130-8.pdf
properties:
compatible:
enum:
- adi,ad4130
reg:
maxItems: 1
clocks:
maxItems: 1
description: phandle to the master clock (mclk)
clock-names:
items:
- const: mclk
interrupts:
maxItems: 1
interrupt-names:
description: |
Specify which interrupt pin should be configured as Data Ready / FIFO
interrupt.
Default if not supplied is int.
enum:
- int
- clk
- p2
- dout
'#address-cells':
const: 1
'#size-cells':
const: 0
'#clock-cells':
const: 0
clock-output-names:
maxItems: 1
refin1-supply:
description: refin1 supply. Can be used as reference for conversion.
refin2-supply:
description: refin2 supply. Can be used as reference for conversion.
avdd-supply:
description: AVDD voltage supply. Can be used as reference for conversion.
iovdd-supply:
description: IOVDD voltage supply. Used for the chip interface.
spi-max-frequency:
maximum: 5000000
adi,ext-clk-freq-hz:
description: Specify the frequency of the external clock.
enum: [76800, 153600]
default: 76800
adi,bipolar:
description: Specify if the device should be used in bipolar mode.
type: boolean
adi,vbias-pins:
description: Analog inputs to apply a voltage bias of (AVDD − AVSS) / 2 to.
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1
maxItems: 16
items:
minimum: 0
maximum: 15
required:
- compatible
- reg
- interrupts
patternProperties:
"^channel@([0-9a-f])$":
type: object
$ref: adc.yaml
unevaluatedProperties: false
properties:
reg:
description: The channel number.
minimum: 0
maximum: 15
diff-channels:
description: |
Besides the analog inputs available, internal inputs can be used.
16: Internal temperature sensor.
17: AVSS
18: Internal reference
19: DGND
20: (AVDD − AVSS)/6+
21: (AVDD − AVSS)/6-
22: (IOVDD − DGND)/6+
23: (IOVDD − DGND)/6-
24: (ALDO − AVSS)/6+
25: (ALDO − AVSS)/6-
26: (DLDO − DGND)/6+
27: (DLDO − DGND)/6-
28: V_MV_P
29: V_MV_M
items:
minimum: 0
maximum: 29
adi,reference-select:
description: |
Select the reference source to use when converting on the
specific channel. Valid values are:
0: REFIN1(+)/REFIN1(−)
1: REFIN2(+)/REFIN2(−)
2: REFOUT/AVSS (Internal reference)
3: AVDD/AVSS
If not specified, REFIN1 is used.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
default: 0
adi,excitation-pin-0:
description: |
Analog input to apply excitation current to while the channel
is active.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 0
adi,excitation-pin-1:
description: |
Analog input to apply excitation current to while this channel
is active.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
default: 0
adi,excitation-current-0-nanoamp:
description: |
Excitation current in nanoamps to be applied to pin specified in
adi,excitation-pin-0 while this channel is active.
enum: [0, 100, 10000, 20000, 50000, 100000, 150000, 200000]
default: 0
adi,excitation-current-1-nanoamp:
description: |
Excitation current in nanoamps to be applied to pin specified in
adi,excitation-pin-1 while this channel is active.
enum: [0, 100, 10000, 20000, 50000, 100000, 150000, 200000]
default: 0
adi,burnout-current-nanoamp:
description: |
Burnout current in nanoamps to be applied for this channel.
enum: [0, 500, 2000, 4000]
default: 0
adi,buffered-positive:
description: Enable buffered mode for positive input.
type: boolean
adi,buffered-negative:
description: Enable buffered mode for negative input.
type: boolean
required:
- reg
- diff-channels
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
compatible = "adi,ad4130";
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <5000000>;
interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
interrupt-parent = <&gpio>;
channel@0 {
reg = <0>;
adi,reference-select = <2>;
/* AIN8, AIN9 */
diff-channels = <8 9>;
};
channel@1 {
reg = <1>;
adi,reference-select = <2>;
/* AIN10, AIN11 */
diff-channels = <10 11>;
};
channel@2 {
reg = <2>;
adi,reference-select = <2>;
/* Temperature Sensor, DGND */
diff-channels = <16 19>;
};
channel@3 {
reg = <3>;
adi,reference-select = <2>;
/* Internal reference, DGND */
diff-channels = <18 19>;
};
channel@4 {
reg = <4>;
adi,reference-select = <2>;
/* DGND, DGND */
diff-channels = <19 19>;
};
};
};

26
Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml
View file

@ -11,7 +11,7 @@ maintainers:
description: | description: |
Analog Devices AD7904, AD7914, AD7923, AD7924 4 Channel ADCs, and AD7908, Analog Devices AD7904, AD7914, AD7923, AD7924 4 Channel ADCs, and AD7908,
AD7918, AD7928 8 Channels ADCs. AD7918, AD7927, AD7928 8 Channels ADCs.
Specifications about the part can be found at: Specifications about the part can be found at:
https://www.analog.com/media/en/technical-documentation/data-sheets/AD7923.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD7923.pdf
@ -20,14 +20,22 @@ description: |
properties: properties:
compatible: compatible:
enum: oneOf:
- adi,ad7904 - enum:
- adi,ad7914 - adi,ad7904
- adi,ad7923 - adi,ad7908
- adi,ad7924 - adi,ad7914
- adi,ad7908 - adi,ad7918
- adi,ad7918 - adi,ad7923
- adi,ad7928 - adi,ad7928
- const: adi,ad7924
deprecated: true
- items:
- const: adi,ad7924
- const: adi,ad7923
- items:
- const: adi,ad7927
- const: adi,ad7928
reg: reg:
maxItems: 1 maxItems: 1

177
Documentation/devicetree/bindings/iio/adc/adi,max11410.yaml Normal file
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@ -0,0 +1,177 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2022 Analog Devices Inc.
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/adc/adi,max11410.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices MAX11410 ADC device driver
maintainers:
- Ibrahim Tilki <Ibrahim.Tilki@analog.com>
description: |
Bindings for the Analog Devices MAX11410 ADC device. Datasheet can be
found here:
https://datasheets.maximintegrated.com/en/ds/MAX11410.pdf
properties:
compatible:
enum:
- adi,max11410
reg:
maxItems: 1
interrupts:
minItems: 1
maxItems: 2
interrupt-names:
description: Name of the gpio pin of max11410 used for IRQ
minItems: 1
items:
- enum: [gpio0, gpio1]
- const: gpio1
'#address-cells':
const: 1
'#size-cells':
const: 0
avdd-supply:
description: Optional avdd supply. Used as reference when no explicit reference supplied.
vref0p-supply:
description: vref0p supply can be used as reference for conversion.
vref1p-supply:
description: vref1p supply can be used as reference for conversion.
vref2p-supply:
description: vref2p supply can be used as reference for conversion.
vref0n-supply:
description: vref0n supply can be used as reference for conversion.
vref1n-supply:
description: vref1n supply can be used as reference for conversion.
vref2n-supply:
description: vref2n supply can be used as reference for conversion.
spi-max-frequency:
maximum: 8000000
patternProperties:
"^channel(@[0-9])?$":
$ref: adc.yaml
type: object
description: Represents the external channels which are connected to the ADC.
properties:
reg:
description: The channel number in single-ended mode.
minimum: 0
maximum: 9
adi,reference:
description: |
Select the reference source to use when converting on
the specific channel. Valid values are:
0: VREF0P/VREF0N
1: VREF1P/VREF1N
2: VREF2P/VREF2N
3: AVDD/AGND
4: VREF0P/AGND
5: VREF1P/AGND
6: VREF2P/AGND
If this field is left empty, AVDD/AGND is selected.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3, 4, 5, 6]
default: 3
adi,input-mode:
description: |
Select signal path of input channels. Valid values are:
0: Buffered, low-power, unity-gain path (default)
1: Bypass path
2: PGA path
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
default: 0
diff-channels: true
bipolar: true
settling-time-us: true
adi,buffered-vrefp:
description: Enable buffered mode for positive reference.
type: boolean
adi,buffered-vrefn:
description: Enable buffered mode for negative reference.
type: boolean
required:
- reg
additionalProperties: false
required:
- compatible
- reg
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
adc@0 {
reg = <0>;
compatible = "adi,max11410";
spi-max-frequency = <8000000>;
interrupt-parent = <&gpio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
interrupt-names = "gpio1";
avdd-supply = <&adc_avdd>;
vref1p-supply = <&adc_vref1p>;
vref1n-supply = <&adc_vref1n>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
};
channel@1 {
reg = <1>;
diff-channels = <2 3>;
adi,reference = <1>;
bipolar;
settling-time-us = <100000>;
};
channel@2 {
reg = <2>;
diff-channels = <7 9>;
adi,reference = <5>;
adi,input-mode = <2>;
settling-time-us = <50000>;
};
};
};

7
Documentation/devicetree/bindings/iio/adc/qcom,spmi-iadc.yaml
View file

@ -18,7 +18,10 @@ description: |
properties: properties:
compatible: compatible:
const: qcom,spmi-iadc items:
- enum:
- qcom,pm8941-iadc
- const: qcom,spmi-iadc
reg: reg:
description: IADC base address and length in the SPMI PMIC register map description: IADC base address and length in the SPMI PMIC register map
@ -50,7 +53,7 @@ examples:
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
pmic_iadc: adc@3600 { pmic_iadc: adc@3600 {
compatible = "qcom,spmi-iadc"; compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";
reg = <0x3600>; reg = <0x3600>;
interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>; interrupts = <0x0 0x36 0x0 IRQ_TYPE_EDGE_RISING>;
qcom,external-resistor-micro-ohms = <10000>; qcom,external-resistor-micro-ohms = <10000>;

12
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml
View file

@ -22,13 +22,11 @@ properties:
- items: - items:
- const: qcom,pms405-adc - const: qcom,pms405-adc
- const: qcom,spmi-adc-rev2 - const: qcom,spmi-adc-rev2
- enum:
- items: - qcom,spmi-vadc
- enum: - qcom,spmi-adc5
- qcom,spmi-vadc - qcom,spmi-adc-rev2
- qcom,spmi-adc5 - qcom,spmi-adc7
- qcom,spmi-adc-rev2
- qcom,spmi-adc7
reg: reg:
description: VADC base address in the SPMI PMIC register map description: VADC base address in the SPMI PMIC register map

2
Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
View file

@ -19,7 +19,7 @@ properties:
compatible: compatible:
items: items:
- enum: - enum:
- renesas,r9a07g043-adc # RZ/G2UL - renesas,r9a07g043-adc # RZ/G2UL and RZ/Five
- renesas,r9a07g044-adc # RZ/G2L - renesas,r9a07g044-adc # RZ/G2L
- renesas,r9a07g054-adc # RZ/V2L - renesas,r9a07g054-adc # RZ/V2L
- const: renesas,rzg2l-adc - const: renesas,rzg2l-adc

1
Documentation/devicetree/bindings/iio/adc/rockchip-saradc.yaml
View file

@ -22,6 +22,7 @@ properties:
- rockchip,rk3328-saradc - rockchip,rk3328-saradc
- rockchip,rk3568-saradc - rockchip,rk3568-saradc
- rockchip,rv1108-saradc - rockchip,rv1108-saradc
- rockchip,rv1126-saradc
- const: rockchip,rk3399-saradc - const: rockchip,rk3399-saradc
reg: reg:

68
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
View file

@ -27,6 +27,7 @@ properties:
- st,stm32f4-adc-core - st,stm32f4-adc-core
- st,stm32h7-adc-core - st,stm32h7-adc-core
- st,stm32mp1-adc-core - st,stm32mp1-adc-core
- st,stm32mp13-adc-core
reg: reg:
maxItems: 1 maxItems: 1
@ -37,6 +38,7 @@ properties:
- stm32f4 and stm32h7 share a common ADC interrupt line. - stm32f4 and stm32h7 share a common ADC interrupt line.
- stm32mp1 has two separate interrupt lines, one for each ADC within - stm32mp1 has two separate interrupt lines, one for each ADC within
ADC block. ADC block.
- stm32mp13 has an interrupt line per ADC block.
minItems: 1 minItems: 1
maxItems: 2 maxItems: 2
@ -180,6 +182,33 @@ allOf:
maximum: 36000000 maximum: 36000000
default: 36000000 default: 36000000
- if:
properties:
compatible:
contains:
const: st,stm32mp13-adc-core
then:
properties:
clocks:
minItems: 1
maxItems: 2
clock-names:
items:
- const: bus
- const: adc
minItems: 1
interrupts:
items:
- description: ADC interrupt line
st,max-clk-rate-hz:
minimum: 150000
maximum: 75000000
default: 75000000
additionalProperties: false additionalProperties: false
required: required:
@ -208,6 +237,7 @@ patternProperties:
- st,stm32f4-adc - st,stm32f4-adc
- st,stm32h7-adc - st,stm32h7-adc
- st,stm32mp1-adc - st,stm32mp1-adc
- st,stm32mp13-adc
reg: reg:
description: | description: |
@ -229,7 +259,7 @@ patternProperties:
interrupts: interrupts:
description: | description: |
IRQ Line for the ADC instance. Valid values are: IRQ Line for the ADC instance. Valid values are:
- 0 for adc@0 - 0 for adc@0 (single adc for stm32mp13)
- 1 for adc@100 - 1 for adc@100
- 2 for adc@200 (stm32f4 only) - 2 for adc@200 (stm32f4 only)
maxItems: 1 maxItems: 1
@ -250,13 +280,14 @@ patternProperties:
assigned-resolution-bits: assigned-resolution-bits:
description: | description: |
Resolution (bits) to use for conversions: Resolution (bits) to use for conversions:
- can be 6, 8, 10 or 12 on stm32f4 - can be 6, 8, 10 or 12 on stm32f4 and stm32mp13
- can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1 - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1
st,adc-channels: st,adc-channels:
description: | description: |
List of single-ended channels muxed for this ADC. It can have up to: List of single-ended channels muxed for this ADC. It can have up to:
- 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4 - 16 channels, numbered from 0 to 15 (for in0..in15) on stm32f4
- 19 channels, numbered from 0 to 18 (for in0..in18) on stm32mp13.
- 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and - 20 channels, numbered from 0 to 19 (for in0..in19) on stm32h7 and
stm32mp1. stm32mp1.
$ref: /schemas/types.yaml#/definitions/uint32-array $ref: /schemas/types.yaml#/definitions/uint32-array
@ -322,7 +353,7 @@ patternProperties:
label: label:
description: | description: |
Unique name to identify which channel this is. Unique name to identify which channel this is.
Reserved label names "vddcore", "vrefint" and "vbat" Reserved label names "vddcore", "vddcpu", "vddq_ddr", "vrefint" and "vbat"
are used to identify internal channels with matching names. are used to identify internal channels with matching names.
diff-channels: diff-channels:
@ -419,6 +450,37 @@ patternProperties:
items: items:
minimum: 40 minimum: 40
- if:
properties:
compatible:
contains:
const: st,stm32mp13-adc
then:
properties:
reg:
const: 0x0
interrupts:
const: 0
assigned-resolution-bits:
enum: [6, 8, 10, 12]
default: 12
st,adc-channels:
minItems: 1
maxItems: 19
items:
minimum: 0
maximum: 18
st,min-sample-time-nsecs:
minItems: 1
maxItems: 19
items:
minimum: 40
additionalProperties: false additionalProperties: false
required: required:

373
Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml Normal file
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@ -0,0 +1,373 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/addac/adi,ad74115.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD74115H device
maintainers:
- Cosmin Tanislav <cosmin.tanislav@analog.com>
description: |
The AD74115H is a single-channel software configurable input/output
device for industrial control applications. It contains functionality for
analog output, analog input, digital output, digital input, resistance
temperature detector, and thermocouple measurements integrated into a single
chip solution with an SPI interface. The device features a 16-bit ADC and a
14-bit DAC.
https://www.analog.com/en/products/ad74115h.html
properties:
compatible:
enum:
- adi,ad74115h
reg:
maxItems: 1
spi-max-frequency:
maximum: 24000000
spi-cpol: true
reset-gpios: true
interrupts:
minItems: 1
maxItems: 2
interrupt-names:
minItems: 1
maxItems: 2
items:
enum:
- adc_rdy
- alert
avdd-supply: true
avcc-supply: true
dvcc-supply: true
dovdd-supply: true
refin-supply: true
adi,ch-func:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Channel function.
0 - High impedance
1 - Voltage output
2 - Current output
3 - Voltage input
4 - Current input, externally-powered
5 - Current input, loop-powered
6 - Resistance input
7 - RTD measure
8 - Digital input logic
9 - Digital input, loop-powered
10 - Current output with HART
11 - Current input, externally-powered, with HART
12 - Current input, loop-powered, with HART
minimum: 0
maximum: 12
default: 0
adi,conv2-mux:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
Input node for ADC conversion 2.
0 - SENSE_EXT1 to AGND_SENSE
1 - SENSE_EXT2 to AGND_SENSE
2 - SENSE_EXT2 to SENSE_EXT1
3 - AGND to AGND
minimum: 0
maximum: 3
default: 0
adi,conv2-range-microvolt:
description: Conversion range for ADC conversion 2.
oneOf:
- items:
- enum: [-2500000, 0]
- const: 2500000
- items:
- enum: [-12000000, 0]
- const: 12000000
- items:
- const: -2500000
- const: 0
- items:
- const: -104000
- const: 104000
- items:
- const: 0
- const: 625000
adi,sense-agnd-buffer-low-power:
type: boolean
description:
Whether to enable low-power buffered mode for the AGND sense pin.
adi,lf-buffer-low-power:
type: boolean
description:
Whether to enable low-power buffered mode for the low-side filtered
sense pin.
adi,hf-buffer-low-power:
type: boolean
description:
Whether to enable low-power buffered mode for the high-side filtered
sense pin.
adi,ext2-buffer-low-power:
type: boolean
description: Whether to enable low-power buffered mode for the EXT2 pin.
adi,ext1-buffer-low-power:
type: boolean
description: Whether to enable low-power buffered mode for the EXT1 pin.
adi,comparator-invert:
type: boolean
description: Whether to invert the comparator output.
adi,digital-input-sink-range-high:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
When not present, the digital input range is from 0 to 3700uA in steps
of 120uA, with a ~2k series resistance.
When present, the digital input range is from 0 to 7400uA in steps
of 240uA, with a ~1k series resistance.
adi,digital-input-sink-microamp:
description: Sink current in digital input mode.
minimum: 0
maximum: 3700
default: 0
adi,digital-input-debounce-mode-counter-reset:
type: boolean
description: |
When not present, a counter increments when the signal is asserted
and decrements when the signal is de-asserted.
When present, a counter increments while the signal is asserted and
resets when the signal de-asserts
adi,digital-input-unbuffered:
type: boolean
description: Whether to buffer digital input signals.
adi,digital-input-short-circuit-detection:
type: boolean
description: Whether to detect digital input short circuits.
adi,digital-input-open-circuit-detection:
type: boolean
description: Whether to detect digital input open circuits.
adi,digital-input-threshold-mode-fixed:
type: boolean
description: |
When not present, the digital input threshold range is -0.96 * AVDD
to AVDD.
When present, the threshold range is fixed from -19V to 30V.
adi,dac-bipolar:
type: boolean
description: |
When not present, the DAC operates in the 0V to 12V range.
When present, the DAC operates in the -12V to 12V range.
adi,charge-pump:
type: boolean
description: Whether to enable the internal charge pump.
adi,dac-hart-slew:
type: boolean
description: Whether to use a HART-compatible slew rate.
adi,dac-current-limit-low:
type: boolean
description: |
When not present, the DAC short-circuit current limit is 32mA in
either source or sink for VOUT and 4mA sink for IOUT.
When present, the limit is 16mA in either source or sink for VOUT,
1mA sink for IOUT.
adi,4-wire-rtd:
type: boolean
description: |
When not present, the ADC should be used for measuring 3-wire RTDs.
When present, the ADC should be used for measuring 4-wire RTDs.
adi,3-wire-rtd-excitation-swap:
type: boolean
description: Whether to swap the excitation for 3-wire RTD.
adi,rtd-excitation-current-microamp:
description: Excitation current to apply to RTD.
enum: [250, 500, 750, 1000]
default: 250
adi,ext1-burnout:
type: boolean
description: Whether to enable burnout current for EXT1.
adi,ext1-burnout-current-nanoamp:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Burnout current in nanoamps to be applied to EXT1.
enum: [0, 50, 500, 1000, 10000]
default: 0
adi,ext1-burnout-current-polarity-sourcing:
type: boolean
description: |
When not present, the burnout current polarity for EXT1 is sinking.
When present, the burnout current polarity for EXT1 is sourcing.
adi,ext2-burnout:
type: boolean
description: Whether to enable burnout current for EXT2.
adi,ext2-burnout-current-nanoamp:
$ref: /schemas/types.yaml#/definitions/uint32
description: Burnout current in nanoamps to be applied to EXT2.
enum: [0, 50, 500, 1000, 10000]
default: 0
adi,ext2-burnout-current-polarity-sourcing:
type: boolean
description: |
When not present, the burnout current polarity for EXT2 is sinking.
When present, the burnout current polarity for EXT2 is sourcing.
adi,viout-burnout:
type: boolean
description: Whether to enable burnout current for VIOUT.
adi,viout-burnout-current-nanoamp:
$ref: /schemas/types.yaml#/definitions/uint32
description: Burnout current in nanoamps to be applied to VIOUT.
enum: [0, 1000, 10000]
default: 0
adi,viout-burnout-current-polarity-sourcing:
type: boolean
description: |
When not present, the burnout current polarity for VIOUT is sinking.
When present, the burnout current polarity for VIOUT is sourcing.
adi,gpio0-mode:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
GPIO functions.
0 - Disabled
1 - Logic I/O
2 - Comparator output
3 - Control HART CD
4 - Monitor HART CD
5 - Monitor HART EOM status
minimum: 0
maximum: 5
default: 0
adi,gpio1-mode:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
GPIO functions.
0 - Disabled
1 - Logic I/O
2 - Drive external digital output FET
3 - Control HART RXD
4 - Monitor HART RXD
5 - Monitor HART SOM status
minimum: 0
maximum: 5
default: 0
adi,gpio2-mode:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
GPIO functions.
0 - Disabled
1 - Logic I/O
2 - Drive internal digital output FET
3 - Control HART TXD
4 - Monitor HART TXD
5 - Monitor HART TX complete status
minimum: 0
maximum: 5
default: 0
adi,gpio3-mode:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
GPIO functions.
0 - Disabled
1 - Logic I/O
2 - High impedance
3 - Control HART RTS
4 - Monitor HART RTS
5 - Monitor HART CD complete status
minimum: 0
maximum: 5
default: 0
required:
- compatible
- reg
- spi-cpol
- avdd-supply
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- if:
required:
- adi,digital-input-sink-range-high
then:
properties:
adi,digital-input-sink-microamp:
maximum: 7400
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
spi {
#address-cells = <1>;
#size-cells = <0>;
addac@0 {
compatible = "adi,ad74115h";
reg = <0>;
spi-max-frequency = <12000000>;
spi-cpol;
reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio>;
interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
interrupt-names = "adc_rdy";
avdd-supply = <&ad74115_avdd>;
adi,ch-func = <1>;
adi,conv2-mux = <2>;
adi,conv2-range-microvolt = <(-12000000) 12000000>;
adi,gpio0-mode = <1>;
adi,gpio1-mode = <1>;
adi,gpio2-mode = <1>;
adi,gpio3-mode = <1>;
adi,dac-bipolar;
};
};
...

15
Documentation/devicetree/bindings/iio/addac/adi,ad74413r.yaml
View file

@ -51,6 +51,9 @@ properties:
Shunt (sense) resistor value in micro-Ohms. Shunt (sense) resistor value in micro-Ohms.
default: 100000000 default: 100000000
reset-gpios:
maxItems: 1
required: required:
- compatible - compatible
- reg - reg
@ -58,8 +61,6 @@ required:
- spi-cpol - spi-cpol
- refin-supply - refin-supply
additionalProperties: false
patternProperties: patternProperties:
"^channel@[0-3]$": "^channel@[0-3]$":
type: object type: object
@ -103,6 +104,11 @@ patternProperties:
required: required:
- reg - reg
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
@ -113,9 +119,7 @@ examples:
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
cs-gpios = <&gpio 17 GPIO_ACTIVE_LOW>; addac@0 {
ad74413r@0 {
compatible = "adi,ad74413r"; compatible = "adi,ad74413r";
reg = <0>; reg = <0>;
spi-max-frequency = <1000000>; spi-max-frequency = <1000000>;
@ -128,6 +132,7 @@ examples:
interrupts = <26 IRQ_TYPE_EDGE_FALLING>; interrupts = <26 IRQ_TYPE_EDGE_FALLING>;
refin-supply = <&ad74413r_refin>; refin-supply = <&ad74413r_refin>;
reset-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
channel@0 { channel@0 {
reg = <0>; reg = <0>;

3
Documentation/devicetree/bindings/iio/dac/adi,ad5758.yaml
View file

@ -102,8 +102,7 @@ allOf:
- if: - if:
properties: properties:
adi,dc-dc-mode: adi,dc-dc-mode:
contains: enum: [1, 3]
enum: [1, 3]
then: then:
properties: properties:
adi,range-microvolt: false adi,range-microvolt: false

2
Documentation/devicetree/bindings/iio/dac/adi,ad5766.yaml
View file

@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD5766 DAC device driver title: Analog Devices AD5766 DAC device driver
maintainers: maintainers:
- Cristian Pop <cristian.pop@analog.com> - Nuno Sá <nuno.sa@analog.com>
description: | description: |
Bindings for the Analog Devices AD5766 current DAC device. Datasheet can be Bindings for the Analog Devices AD5766 current DAC device. Datasheet can be

7
Documentation/devicetree/bindings/iio/frequency/adi,adf4350.yaml
View file

@ -160,13 +160,16 @@ properties:
2: +2dBm 2: +2dBm
3: +5dBm 3: +5dBm
additionalProperties: false
required: required:
- compatible - compatible
- reg - reg
- clocks - clocks
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |
spi { spi {

92
Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml Normal file
View file

@ -0,0 +1,92 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/iio/frequency/adi,adf4377.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ADF4377 Microwave Wideband Synthesizer with Integrated VCO
maintainers:
- Antoniu Miclaus <antoniu.miclaus@analog.com>
- Dragos Bogdan <dragos.bogdan@analog.com>
description: |
The ADF4377 is a high performance, ultralow jitter, dual output integer-N
phased locked loop (PLL) with integrated voltage controlled oscillator (VCO)
ideally suited for data converter and mixed signal front end (MxFE) clock
applications.
https://www.analog.com/en/products/adf4377.html
properties:
compatible:
enum:
- adi,adf4377
- adi,adf4378
reg:
maxItems: 1
spi-max-frequency:
maximum: 10000000
clocks:
maxItems: 1
clock-names:
description:
External clock that provides reference input frequency.
items:
- const: ref_in
chip-enable-gpios:
description:
GPIO that controls the Chip Enable Pin.
maxItems: 1
clk1-enable-gpios:
description:
GPIO that controls the Enable Clock 1 Output Buffer Pin.
maxItems: 1
clk2-enable-gpios:
description:
GPIO that controls the Enable Clock 2 Output Buffer Pin.
maxItems: 1
adi,muxout-select:
description:
On chip multiplexer output selection.
high_z - MUXOUT Pin set to high-Z.
lock_detect - MUXOUT Pin set to lock detector output.
muxout_low - MUXOUT Pin set to low.
f_div_rclk_2 - MUXOUT Pin set to fDIV_RCLK/2.
f_div_nclk_2 - MUXOUT Pin set to fDIV_NCLK/2.
muxout_high - MUXOUT Pin set to high.
enum: [high_z, lock_detect, muxout_low, f_div_rclk_2, f_div_nclk_2, muxout_high]
required:
- compatible
- reg
- clocks
- clock-names
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
frequency@0 {
compatible = "adi,adf4377";
reg = <0>;
spi-max-frequency = <10000000>;
clocks = <&adf4377_ref_in>;
clock-names = "ref_in";
};
};
...

5
Documentation/devicetree/bindings/iio/frequency/adi,admv1013.yaml
View file

@ -70,7 +70,10 @@ required:
- clock-names - clock-names
- vcm-supply - vcm-supply
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |

5
Documentation/devicetree/bindings/iio/frequency/adi,admv1014.yaml
View file

@ -104,7 +104,10 @@ required:
- clock-names - clock-names
- vcm-supply - vcm-supply
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |

8
Documentation/devicetree/bindings/iio/frequency/adi,admv4420.yaml
View file

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: ADMV4420 K Band Downconverter title: ADMV4420 K Band Downconverter
maintainers: maintainers:
- Cristian Pop <cristian.pop@analog.com> - Nuno Sá <nuno.sa@analog.com>
description: description:
The ADMV4420 is a highly integrated, double balanced, active The ADMV4420 is a highly integrated, double balanced, active
@ -37,7 +37,11 @@ required:
- compatible - compatible
- reg - reg
additionalProperties: false
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |

5
Documentation/devicetree/bindings/iio/frequency/adi,adrf6780.yaml
View file

@ -113,7 +113,10 @@ required:
- clocks - clocks
- clock-names - clock-names
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |

5
Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml
View file

@ -38,7 +38,10 @@ required:
- spi-cpol - spi-cpol
- spi-cpha - spi-cpha
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |

5
Documentation/devicetree/bindings/iio/gyroscope/nxp,fxas21002c.yaml
View file

@ -56,7 +56,10 @@ required:
- compatible - compatible
- reg - reg
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |

3
Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml
View file

@ -79,6 +79,7 @@ required:
- spi-cpol - spi-cpol
allOf: allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
- if: - if:
properties: properties:
compatible: compatible:
@ -107,7 +108,7 @@ allOf:
dependencies: dependencies:
adi,sync-mode: [ clocks ] adi,sync-mode: [ clocks ]
additionalProperties: false unevaluatedProperties: false
examples: examples:
- | - |

1
Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml
View file

@ -31,6 +31,7 @@ properties:
- invensense,icm42602 - invensense,icm42602
- invensense,icm42605 - invensense,icm42605
- invensense,icm42622 - invensense,icm42622
- invensense,icm42631
reg: reg:
maxItems: 1 maxItems: 1

8
Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml
View file

@ -32,12 +32,20 @@ properties:
- st,lsm6dsrx - st,lsm6dsrx
- st,lsm6dst - st,lsm6dst
- st,lsm6dsop - st,lsm6dsop
- st,lsm6dsv
- st,lsm6dso16is
- items: - items:
- const: st,asm330lhhx - const: st,asm330lhhx
- const: st,lsm6dsr - const: st,lsm6dsr
- items: - items:
- const: st,lsm6dstx - const: st,lsm6dstx
- const: st,lsm6dst - const: st,lsm6dst
- items:
- const: st,lsm6dsv16x
- const: st,lsm6dsv
- items:
- const: st,ism330is
- const: st,lsm6dso16is
reg: reg:
maxItems: 1 maxItems: 1

6
Documentation/devicetree/bindings/iio/pressure/meas,ms5611.yaml
View file

@ -30,7 +30,10 @@ required:
- compatible - compatible
- reg - reg
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |
@ -52,6 +55,7 @@ examples:
compatible = "meas,ms5611"; compatible = "meas,ms5611";
reg = <0>; reg = <0>;
vdd-supply = <&ldo_3v3_gnss>; vdd-supply = <&ldo_3v3_gnss>;
spi-max-frequency = <20000000>;
}; };
}; };
... ...

5
Documentation/devicetree/bindings/iio/pressure/murata,zpa2326.yaml
View file

@ -33,7 +33,10 @@ required:
- compatible - compatible
- reg - reg
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |

5
Documentation/devicetree/bindings/iio/proximity/ams,as3935.yaml
View file

@ -49,7 +49,10 @@ required:
- spi-cpha - spi-cpha
- interrupts - interrupts
additionalProperties: false allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |

7
Documentation/devicetree/bindings/iio/resolver/adi,ad2s90.yaml
View file

@ -33,8 +33,6 @@ properties:
spi-cpha: true spi-cpha: true
additionalProperties: false
required: required:
- compatible - compatible
- reg - reg
@ -43,6 +41,11 @@ dependencies:
spi-cpol: [ spi-cpha ] spi-cpol: [ spi-cpha ]
spi-cpha: [ spi-cpol ] spi-cpha: [ spi-cpol ]
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
unevaluatedProperties: false
examples: examples:
- | - |
spi { spi {

336
Documentation/devicetree/bindings/iio/temperature/adi,ltc2983.yaml
View file

@ -4,19 +4,30 @@
$id: http://devicetree.org/schemas/iio/temperature/adi,ltc2983.yaml# $id: http://devicetree.org/schemas/iio/temperature/adi,ltc2983.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices LTC2983 Multi-sensor Temperature system title: Analog Devices LTC2983, LTC2986, LTM2985 Multi-sensor Temperature system
maintainers: maintainers:
- Nuno Sá <nuno.sa@analog.com> - Nuno Sá <nuno.sa@analog.com>
description: | description: |
Analog Devices LTC2983 Multi-Sensor Digital Temperature Measurement System Analog Devices LTC2983, LTC2984, LTC2986, LTM2985 Multi-Sensor Digital
Temperature Measurement Systems
https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/2984fb.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/29861fa.pdf
https://www.analog.com/media/en/technical-documentation/data-sheets/ltm2985.pdf
properties: properties:
compatible: compatible:
enum: oneOf:
- adi,ltc2983 - enum:
- adi,ltc2983
- adi,ltc2986
- adi,ltm2985
- items:
- const: adi,ltc2984
- const: adi,ltc2983
reg: reg:
maxItems: 1 maxItems: 1
@ -25,26 +36,26 @@ properties:
maxItems: 1 maxItems: 1
adi,mux-delay-config-us: adi,mux-delay-config-us:
description: description: |
The LTC2983 performs 2 or 3 internal conversion cycles per temperature Extra delay prior to each conversion, in addition to the internal 1ms
result. Each conversion cycle is performed with different excitation and delay, for the multiplexer to switch input configurations and
input multiplexer configurations. Prior to each conversion, these excitation values.
excitation circuits and input switch configurations are changed and an
internal 1ms delay ensures settling prior to the conversion cycle in most This property is supposed to be in microseconds, but to maintain
cases. An extra delay can be configured using this property. The value is compatibility, this value will be multiplied by 100 before usage.
rounded to nearest 100us.
maximum: 255 maximum: 255
default: 0
adi,filter-notch-freq: adi,filter-notch-freq:
description: description:
Set's the default setting of the digital filter. The default is Notch frequency of the digital filter.
simultaneous 50/60Hz rejection.
0 - 50/60Hz rejection 0 - 50/60Hz rejection
1 - 60Hz rejection 1 - 60Hz rejection
2 - 50Hz rejection 2 - 50Hz rejection
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0 minimum: 0
maximum: 2 maximum: 2
default: 0
'#address-cells': '#address-cells':
const: 1 const: 1
@ -53,19 +64,20 @@ properties:
const: 0 const: 0
patternProperties: patternProperties:
"@([1-9]|1[0-9]|20)$": "@([0-9a-f]+)$":
type: object type: object
description: Sensor.
properties: properties:
reg: reg:
description: description:
The channel number. It can be connected to one of the 20 channels of Channel number. Connects the sensor to the channel with this number
the device. of the device.
minimum: 1 minimum: 1
maximum: 20 maximum: 20
adi,sensor-type: adi,sensor-type:
description: Identifies the type of sensor connected to the device. description: Type of sensor connected to the device.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
required: required:
@ -74,9 +86,7 @@ patternProperties:
"^thermocouple@": "^thermocouple@":
type: object type: object
description: description: Thermocouple sensor.
Represents a thermocouple sensor which is connected to one of the device
channels.
properties: properties:
adi,sensor-type: adi,sensor-type:
@ -95,86 +105,87 @@ patternProperties:
maximum: 9 maximum: 9
adi,single-ended: adi,single-ended:
description: description: Whether the sensor is single-ended.
Boolean property which set's the thermocouple as single-ended.
type: boolean type: boolean
adi,sensor-oc-current-microamp: adi,sensor-oc-current-microamp:
description: description: Pulsed current value applied during open-circuit detect.
This property set's the pulsed current value applied during
open-circuit detect.
enum: [10, 100, 500, 1000] enum: [10, 100, 500, 1000]
default: 10
adi,cold-junction-handle: adi,cold-junction-handle:
description: description:
Phandle which points to a sensor object responsible for measuring Sensor responsible for measuring the thermocouple cold junction
the thermocouple cold junction temperature. temperature.
$ref: "/schemas/types.yaml#/definitions/phandle" $ref: /schemas/types.yaml#/definitions/phandle
adi,custom-thermocouple: adi,custom-thermocouple:
description: description:
This is a table, where each entry should be a pair of Used for digitizing custom thermocouples.
voltage(mv)-temperature(K). The entries must be given in nv and uK See Page 59 of the datasheet.
so that, the original values must be multiplied by 1000000. For
more details look at table 69 and 70.
Note should be signed, but dtc doesn't currently maintain the
sign.
$ref: /schemas/types.yaml#/definitions/uint64-matrix $ref: /schemas/types.yaml#/definitions/uint64-matrix
minItems: 3 minItems: 3
maxItems: 64 maxItems: 64
items: items:
minItems: 2 items:
maxItems: 2 - description: Voltage point in nV, signed.
- description: Temperature point in uK.
allOf:
- if:
properties:
adi,sensor-type:
const: 9
then:
required:
- adi,custom-thermocouple
"^diode@": "^diode@":
type: object type: object
description: description: Diode sensor.
Represents a diode sensor which is connected to one of the device
channels.
properties: properties:
adi,sensor-type: adi,sensor-type:
description: Identifies the sensor as a diode. description: Sensor type for diodes.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
const: 28 const: 28
adi,single-ended: adi,single-ended:
description: Boolean property which set's the diode as single-ended. description: Whether the sensor is single-ended.
type: boolean type: boolean
adi,three-conversion-cycles: adi,three-conversion-cycles:
description: description:
Boolean property which set's three conversion cycles removing Whether to use three conversion cycles to remove parasitic
parasitic resistance effects between the LTC2983 and the diode. resistance between the device and the diode.
type: boolean type: boolean
adi,average-on: adi,average-on:
description: description:
Boolean property which enables a running average of the diode Whether to use a running average of the diode temperature
temperature reading. This reduces the noise when the diode is used reading to reduce the noise when the diode is used as a cold
as a cold junction temperature element on an isothermal block junction temperature element on an isothermal block where
where temperatures change slowly. temperatures change slowly.
type: boolean type: boolean
adi,excitation-current-microamp: adi,excitation-current-microamp:
description: description:
This property controls the magnitude of the excitation current Magnitude of the 1l excitation current applied to the diode.
applied to the diode. Depending on the number of conversions 4l excitation current will be 4 times this value, and 8l
cycles, this property will assume different predefined values on excitation current will be 8 times value.
each cycle. Just set the value of the first cycle (1l).
enum: [10, 20, 40, 80] enum: [10, 20, 40, 80]
default: 10
adi,ideal-factor-value: adi,ideal-factor-value:
description: description:
This property sets the diode ideality factor. The real value must Diode ideality factor.
be multiplied by 1000000 to remove the fractional part. For more Set this property to 1000000 times the real value.
information look at table 20 of the datasheet.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
default: 0
"^rtd@": "^rtd@":
type: object type: object
description: description: RTD sensor.
Represents a rtd sensor which is connected to one of the device channels.
properties: properties:
reg: reg:
@ -197,68 +208,82 @@ patternProperties:
maximum: 18 maximum: 18
adi,rsense-handle: adi,rsense-handle:
description: description: Associated sense resistor sensor.
Phandle pointing to a rsense object associated with this RTD. $ref: /schemas/types.yaml#/definitions/phandle
$ref: "/schemas/types.yaml#/definitions/phandle"
adi,number-of-wires: adi,number-of-wires:
description: description:
Identifies the number of wires used by the RTD. Setting this Number of wires used by the RTD.
property to 5 means 4 wires with Kelvin Rsense. 5 means 4 wires with Kelvin sense resistor.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
enum: [2, 3, 4, 5] enum: [2, 3, 4, 5]
default: 2
adi,rsense-share: adi,rsense-share:
description: description:
Boolean property which enables Rsense sharing, where one sense Whether to enable sense resistor sharing, where one sense
resistor is used for multiple 2-, 3-, and/or 4-wire RTDs. resistor is used by multiple sensors.
type: boolean
adi,current-rotate:
description:
Boolean property which enables excitation current rotation to
automatically remove parasitic thermocouple effects. Note that
this property is not allowed for 2- and 3-wire RTDs.
type: boolean type: boolean
adi,excitation-current-microamp: adi,excitation-current-microamp:
description: description: Excitation current applied to the RTD.
This property controls the magnitude of the excitation current
applied to the RTD.
enum: [5, 10, 25, 50, 100, 250, 500, 1000] enum: [5, 10, 25, 50, 100, 250, 500, 1000]
default: 5
adi,rtd-curve: adi,rtd-curve:
description: description: |
This property set the RTD curve used and the corresponding RTD curve and the corresponding Callendar-VanDusen constants.
Callendar-VanDusen constants. Look at table 30 of the datasheet. 0 - European
1 - American
2 - Japanese
3 - ITS-90
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
minimum: 0 minimum: 0
maximum: 3 maximum: 3
default: 0
adi,custom-rtd: adi,custom-rtd:
description: description:
This is a table, where each entry should be a pair of Used for digitizing custom RTDs.
resistance(ohm)-temperature(K). The entries added here are in uohm See Page 62 of the datasheet.
and uK. For more details values look at table 74 and 75.
$ref: /schemas/types.yaml#/definitions/uint64-matrix $ref: /schemas/types.yaml#/definitions/uint64-matrix
minItems: 3
maxItems: 64
items: items:
minItems: 3
maxItems: 64
items: items:
minItems: 2 - description: Resistance point in uOhms.
maxItems: 2 - description: Temperature point in uK.
required: required:
- adi,rsense-handle - adi,rsense-handle
dependencies: allOf:
adi,current-rotate: [ "adi,rsense-share" ] - if:
properties:
adi,number-of-wires:
const: 4
then:
properties:
adi,current-rotate:
description:
Whether to enable excitation current rotation to automatically
remove parasitic thermocouple effects.
type: boolean
dependencies:
adi,current-rotate: [ "adi,rsense-share" ]
- if:
properties:
adi,sensor-type:
const: 18
then:
required:
- adi,custom-rtd
"^thermistor@": "^thermistor@":
type: object type: object
description: description: Thermistor sensor.
Represents a thermistor sensor which is connected to one of the device
channels.
properties: properties:
adi,sensor-type: adi,sensor-type:
@ -277,61 +302,53 @@ patternProperties:
maximum: 27 maximum: 27
adi,rsense-handle: adi,rsense-handle:
description: description: Associated sense resistor sensor.
Phandle pointing to a rsense object associated with this $ref: /schemas/types.yaml#/definitions/phandle
thermistor.
$ref: "/schemas/types.yaml#/definitions/phandle"
adi,single-ended: adi,single-ended:
description: description: Whether the sensor is single-ended.
Boolean property which set's the thermistor as single-ended.
type: boolean type: boolean
adi,rsense-share: adi,rsense-share:
description: description:
Boolean property which enables Rsense sharing, where one sense Whether to enable sense resistor sharing, where one sense
resistor is used for multiple thermistors. Note that this property resistor is used by multiple sensors.
is ignored if adi,single-ended is set.
type: boolean type: boolean
adi,current-rotate: adi,current-rotate:
description: description:
Boolean property which enables excitation current rotation to Whether to enable excitation current rotation to automatically
automatically remove parasitic thermocouple effects. remove parasitic thermocouple effects.
type: boolean type: boolean
adi,excitation-current-nanoamp: adi,excitation-current-nanoamp:
description: description:
This property controls the magnitude of the excitation current Excitation current applied to the thermistor.
applied to the thermistor. Value 0 set's the sensor in auto-range 0 sets the sensor in auto-range mode.
mode.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 250, 500, 1000, 5000, 10000, 25000, 50000, 100000, 250000, enum: [0, 250, 500, 1000, 5000, 10000, 25000, 50000, 100000, 250000,
500000, 1000000] 500000, 1000000]
default: 0
adi,custom-thermistor: adi,custom-thermistor:
description: description:
This is a table, where each entry should be a pair of Used for digitizing custom thermistors.
resistance(ohm)-temperature(K). The entries added here are in uohm See Page 65 of the datasheet.
and uK only for custom thermistors. For more details look at table
78 and 79.
$ref: /schemas/types.yaml#/definitions/uint64-matrix $ref: /schemas/types.yaml#/definitions/uint64-matrix
minItems: 3 minItems: 3
maxItems: 64 maxItems: 64
items: items:
minItems: 2 items:
maxItems: 2 - description: Resistance point in uOhms.
- description: Temperature point in uK.
adi,custom-steinhart: adi,custom-steinhart:
description: description:
Steinhart-Hart coefficients are also supported and can Steinhart-Hart coefficients in raw format, used for digitizing
be programmed into the device memory using this property. For custom thermistors.
Steinhart sensors the coefficients are given in the raw See Page 68 of the datasheet.
format. Look at table 82 for more information.
$ref: /schemas/types.yaml#/definitions/uint32-array $ref: /schemas/types.yaml#/definitions/uint32-array
items: minItems: 6
minItems: 6 maxItems: 6
maxItems: 6
required: required:
- adi,rsense-handle - adi,rsense-handle
@ -339,25 +356,78 @@ patternProperties:
dependencies: dependencies:
adi,current-rotate: [ "adi,rsense-share" ] adi,current-rotate: [ "adi,rsense-share" ]
allOf:
- if:
properties:
adi,sensor-type:
const: 26
then:
properties:
adi,excitation-current-nanoamp:
enum: [250, 500, 1000, 5000, 10000, 25000, 50000, 100000,
250000, 500000, 1000000]
default: 1000
required:
- adi,custom-steinhart
- if:
properties:
adi,sensor-type:
const: 27
then:
properties:
adi,excitation-current-nanoamp:
enum: [250, 500, 1000, 5000, 10000, 25000, 50000, 100000,
250000, 500000, 1000000]
default: 1000
required:
- adi,custom-thermistor
"^adc@": "^adc@":
type: object type: object
description: Represents a channel which is being used as a direct adc. description: Direct ADC sensor.
properties: properties:
adi,sensor-type: adi,sensor-type:
description: Identifies the sensor as a direct adc. description: Sensor type for direct ADC sensors.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
const: 30 const: 30
adi,single-ended: adi,single-ended:
description: Boolean property which set's the adc as single-ended. description: Whether the sensor is single-ended.
type: boolean type: boolean
"^temp@":
type: object
description: Active analog temperature sensor.
properties:
adi,sensor-type:
description: Sensor type for active analog temperature sensors.
$ref: /schemas/types.yaml#/definitions/uint32
const: 31
adi,single-ended:
description: Whether the sensor is single-ended.
type: boolean
adi,custom-temp:
description:
Used for digitizing active analog temperature sensors.
See Page 67 of the LTM2985 datasheet.
$ref: /schemas/types.yaml#/definitions/uint64-matrix
minItems: 3
maxItems: 64
items:
items:
- description: Voltage point in nV, signed.
- description: Temperature point in uK.
required:
- adi,custom-temp
"^rsense@": "^rsense@":
type: object type: object
description: description: Sense resistor sensor.
Represents a rsense which is connected to one of the device channels.
Rsense are used by thermistors and RTD's.
properties: properties:
reg: reg:
@ -365,14 +435,12 @@ patternProperties:
maximum: 20 maximum: 20
adi,sensor-type: adi,sensor-type:
description: Identifies the sensor as a rsense. description: Sensor type sense resistor sensors.
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
const: 29 const: 29
adi,rsense-val-milli-ohms: adi,rsense-val-milli-ohms:
description: description: Value of the sense resistor.
Sets the value of the sense resistor. Look at table 20 of the
datasheet for information.
required: required:
- adi,rsense-val-milli-ohms - adi,rsense-val-milli-ohms
@ -384,6 +452,18 @@ required:
additionalProperties: false additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
enum:
- adi,ltc2983
- adi,ltc2984
then:
patternProperties:
"^temp@": false
examples: examples:
- | - |
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
@ -391,7 +471,7 @@ examples:
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
sensor_ltc2983: ltc2983@0 { temperature-sensor@0 {
compatible = "adi,ltc2983"; compatible = "adi,ltc2983";
reg = <0>; reg = <0>;

5
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml
View file

@ -25,9 +25,14 @@ properties:
- items: - items:
- enum: - enum:
- qcom,sc7280-cpu-bwmon - qcom,sc7280-cpu-bwmon
- qcom,sc8280xp-cpu-bwmon
- qcom,sdm845-bwmon - qcom,sdm845-bwmon
- const: qcom,msm8998-bwmon - const: qcom,msm8998-bwmon
- const: qcom,msm8998-bwmon # BWMON v4 - const: qcom,msm8998-bwmon # BWMON v4
- items:
- enum:
- qcom,sc8280xp-llcc-bwmon
- const: qcom,sc7280-llcc-bwmon
- const: qcom,sc7280-llcc-bwmon # BWMON v5 - const: qcom,sc7280-llcc-bwmon # BWMON v5
- const: qcom,sdm845-llcc-bwmon # BWMON v5 - const: qcom,sdm845-llcc-bwmon # BWMON v5

24
Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
View file

@ -16,13 +16,21 @@ description:
properties: properties:
compatible: compatible:
enum: oneOf:
- qcom,sc7180-osm-l3 - items:
- qcom,sc7280-epss-l3 - enum:
- qcom,sc8180x-osm-l3 - qcom,sc7180-osm-l3
- qcom,sdm845-osm-l3 - qcom,sc8180x-osm-l3
- qcom,sm8150-osm-l3 - qcom,sdm845-osm-l3
- qcom,sm8250-epss-l3 - qcom,sm8150-osm-l3
- const: qcom,osm-l3
- items:
- enum:
- qcom,sc7280-epss-l3
- qcom,sc8280xp-epss-l3
- qcom,sm8250-epss-l3
- qcom,sm8350-epss-l3
- const: qcom,epss-l3
reg: reg:
maxItems: 1 maxItems: 1
@ -56,7 +64,7 @@ examples:
#define RPMH_CXO_CLK 0 #define RPMH_CXO_CLK 0
osm_l3: interconnect@17d41000 { osm_l3: interconnect@17d41000 {
compatible = "qcom,sdm845-osm-l3"; compatible = "qcom,sdm845-osm-l3", "qcom,osm-l3";
reg = <0x17d41000 0x1400>; reg = <0x17d41000 0x1400>;
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;

2
Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml
View file

@ -79,7 +79,7 @@ patternProperties:
iommus: iommus:
minItems: 1 minItems: 1
maxItems: 2 maxItems: 3
qcom,nsessions: qcom,nsessions:
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32

64
Documentation/devicetree/bindings/nvmem/layouts/kontron,sl28-vpd.yaml Normal file
View file

@ -0,0 +1,64 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/layouts/kontron,sl28-vpd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVMEM layout of the Kontron SMARC-sAL28 vital product data
maintainers:
- Michael Walle <michael@walle.cc>
description:
The vital product data (VPD) of the sl28 boards contains a serial
number and a base MAC address. The actual MAC addresses for the
on-board ethernet devices are derived from this base MAC address by
adding an offset.
select: false
properties:
compatible:
const: kontron,sl28-vpd
serial-number:
type: object
description: The board's serial number
additionalProperties: false
base-mac-address:
type: object
description:
Base MAC address for all on-module network interfaces. The first
argument of the phandle will be treated as an offset.
properties:
"#nvmem-cell-cells":
const: 1
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
otp-1 {
compatible = "user-otp";
nvmem-layout {
compatible = "kontron,sl28-vpd";
serial_number: serial-number {
};
base_mac_address: base-mac-address {
#nvmem-cell-cells = <1>;
};
};
};
...

34
Documentation/devicetree/bindings/nvmem/layouts/nvmem-layout.yaml Normal file
View file

@ -0,0 +1,34 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/layouts/nvmem-layout.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVMEM (Non Volatile Memory) layouts
maintainers:
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
- Michael Walle <michael@walle.cc>
- Miquel Raynal <miquel.raynal@bootlin.com>
description: |
Most NVMEM layouts are static and thus do not require additional description
besides the bytes/bits offset and length. Other layouts can be less statically
define and might require dynamic reading of the NVMEM device in order to
perform their parsing. The nvmem-layout container is here to describe these.
oneOf:
- $ref: kontron,sl28-vpd.yaml
- $ref: onie,tlv-layout.yaml
properties:
compatible: true
'#address-cells': false
'#size-cells': false
required:
- compatible
unevaluatedProperties: false

147
Documentation/devicetree/bindings/nvmem/layouts/onie,tlv-layout.yaml Normal file
View file

@ -0,0 +1,147 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/layouts/onie,tlv-layout.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVMEM layout of the ONIE tlv table
maintainers:
- Miquel Raynal <miquel.raynal@bootlin.com>
description:
Modern networking hardware implementing the Open Compute Project ONIE
infrastructure shall provide a non-volatile memory with a table whose the
content is well specified and gives many information about the manufacturer
(name, country of manufacture, etc) as well as device caracteristics (serial
number, hardware version, mac addresses, etc). The underlaying device type
(flash, EEPROM,...) is not specified. The exact location of each value is also
dynamic and should be discovered at run time because it depends on the
parameters the manufacturer decided to embed.
select: false
properties:
compatible:
const: onie,tlv-layout
product-name:
type: object
additionalProperties: false
part-number:
type: object
additionalProperties: false
serial-number:
type: object
additionalProperties: false
mac-address:
type: object
description:
Base MAC address for all on-module network interfaces. The first
argument of the phandle will be treated as an offset.
properties:
"#nvmem-cell-cells":
const: 1
additionalProperties: false
manufacture-date:
type: object
additionalProperties: false
device-version:
type: object
additionalProperties: false
label-revision:
type: object
additionalProperties: false
platforn-name:
type: object
additionalProperties: false
onie-version:
type: object
additionalProperties: false
num-macs:
type: object
additionalProperties: false
manufacturer:
type: object
additionalProperties: false
country-code:
type: object
additionalProperties: false
vendor:
type: object
additionalProperties: false
diag-version:
type: object
additionalProperties: false
service-tag:
type: object
additionalProperties: false
vendor-extension:
type: object
additionalProperties: false
required:
- compatible
additionalProperties: false
examples:
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
eeprom@56 {
compatible = "atmel,24c64";
read-only;
reg = <0x56>;
nvmem-layout {
compatible = "onie,tlv-layout";
serial-number {
};
};
};
};
- |
spi {
#address-cells = <1>;
#size-cells = <0>;
flash@0 {
compatible = "m25p80", "jedec,spi-nor";
reg = <0>;
otp {
compatible = "user-otp";
nvmem-layout {
compatible = "onie,tlv-layout";
mac-address {
#nvmem-cell-cells = <1>;
};
};
};
};
};
...

8
Documentation/devicetree/bindings/nvmem/nvmem.yaml
View file

@ -39,6 +39,13 @@ properties:
when it's driven low (logical '0') to allow writing. when it's driven low (logical '0') to allow writing.
maxItems: 1 maxItems: 1
nvmem-layout:
$ref: /schemas/nvmem/layouts/nvmem-layout.yaml
description:
Alternative to the statically defined nvmem cells, this
container may reference more advanced (dynamic) layout
parsers.
patternProperties: patternProperties:
"@[0-9a-f]+(,[0-7])?$": "@[0-9a-f]+(,[0-7])?$":
type: object type: object
@ -67,6 +74,7 @@ examples:
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
qfprom: eeprom@700000 { qfprom: eeprom@700000 {
compatible = "qcom,msm8974-qfprom", "qcom,qfprom";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
reg = <0x00700000 0x100000>; reg = <0x00700000 0x100000>;

1
Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml
View file

@ -22,6 +22,7 @@ properties:
compatible: compatible:
enum: enum:
- st,stm32f4-otp - st,stm32f4-otp
- st,stm32mp13-bsec
- st,stm32mp15-bsec - st,stm32mp15-bsec
reg: reg:

60
Documentation/devicetree/bindings/slimbus/bus.txt
View file

@ -1,60 +0,0 @@
SLIM(Serial Low Power Interchip Media Bus) bus
SLIMbus is a 2-wire bus, and is used to communicate with peripheral
components like audio-codec.
Required property for SLIMbus controller node:
- compatible - name of SLIMbus controller
Child nodes:
Every SLIMbus controller node can contain zero or more child nodes
representing slave devices on the bus. Every SLIMbus slave device is
uniquely determined by the enumeration address containing 4 fields:
Manufacturer ID, Product code, Device index, and Instance value for
the device.
If child node is not present and it is instantiated after device
discovery (slave device reporting itself present).
In some cases it may be necessary to describe non-probeable device
details such as non-standard ways of powering up a device. In
such cases, child nodes for those devices will be present as
slaves of the SLIMbus controller, as detailed below.
Required property for SLIMbus child node if it is present:
- reg - Should be ('Device index', 'Instance ID') from SLIMbus
Enumeration Address.
Device Index Uniquely identifies multiple Devices within
a single Component.
Instance ID Is for the cases where multiple Devices of the
same type or Class are attached to the bus.
- compatible -"slimMID,PID". The textual representation of Manufacturer ID,
Product Code, shall be in lower case hexadecimal with leading
zeroes suppressed
Optional property for SLIMbus child node if it is present:
- slim-ifc-dev - Should be phandle to SLIMBus Interface device.
Required for devices which deal with streams.
SLIMbus example for Qualcomm's slimbus manager component:
slim@28080000 {
compatible = "qcom,apq8064-slim", "qcom,slim";
reg = <0x28080000 0x2000>,
interrupts = <0 33 0>;
clocks = <&lcc SLIMBUS_SRC>, <&lcc AUDIO_SLIMBUS_CLK>;
clock-names = "iface", "core";
#address-cells = <2>;
#size-cell = <0>;
codec_ifd: ifd@0,0{
compatible = "slim217,60";
reg = <0 0>;
};
codec: wcd9310@1,0{
compatible = "slim217,60";
reg = <1 0>;
slim-ifc-dev = <&codec_ifd>;
};
};

120
Documentation/devicetree/bindings/slimbus/qcom,slim-ngd.yaml Normal file
View file

@ -0,0 +1,120 @@
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/slimbus/qcom,slim-ngd.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SoC SLIMBus Non Generic Device (NGD) Controller
maintainers:
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
description:
SLIMBus NGD controller is a light-weight driver responsible for communicating
with SLIMBus slaves directly over the bus using messaging interface and
communicating with master component residing on ADSP for bandwidth and
data-channel management
properties:
compatible:
enum:
- qcom,slim-ngd-v1.5.0 # for MSM8996
- qcom,slim-ngd-v2.1.0 # for SDM845
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
dmas:
maxItems: 2
dma-names:
items:
- const: rx
- const: tx
interrupts:
maxItems: 1
iommus:
maxItems: 1
patternProperties:
"^slim@[0-9a-f]+$":
type: object
$ref: slimbus.yaml#
description:
Each subnode represents an instance of NGD
properties:
reg:
maxItems: 1
unevaluatedProperties: false
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
- dmas
- dma-names
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
slim-ngd@171c0000 {
compatible = "qcom,slim-ngd-v2.1.0";
reg = <0x171c0000 0x2c000>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&slimbam 3>, <&slimbam 4>;
dma-names = "rx", "tx";
iommus = <&apps_smmu 0x1806 0x0>;
#address-cells = <1>;
#size-cells = <0>;
slim@1 {
reg = <1>;
#address-cells = <2>;
#size-cells = <0>;
codec@1,0 {
compatible = "slim217,250";
reg = <1 0>;
slim-ifc-dev = <&wcd9340_ifd>;
#sound-dai-cells = <1>;
interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
#clock-cells = <0>;
clock-frequency = <9600000>;
clock-output-names = "mclk";
qcom,micbias1-microvolt = <1800000>;
qcom,micbias2-microvolt = <1800000>;
qcom,micbias3-microvolt = <1800000>;
qcom,micbias4-microvolt = <1800000>;
#address-cells = <1>;
#size-cells = <1>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
/* Rest of the WCD9340 codec */
};
};
};

86
Documentation/devicetree/bindings/slimbus/qcom,slim.yaml Normal file
View file

@ -0,0 +1,86 @@
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/slimbus/qcom,slim.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SoC SLIMbus controller
maintainers:
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
description:
SLIMbus controller used when applications processor controls SLIMbus master
component.
allOf:
- $ref: slimbus.yaml#
properties:
compatible:
items:
- enum:
- qcom,apq8064-slim
- const: qcom,slim
reg:
items:
- description: Physical address of controller register blocks
- description: SLEW RATE register
reg-names:
items:
- const: ctrl
- const: slew
clocks:
items:
- description: Interface clock for this controller
- description: Interrupt for controller core's BAM
clock-names:
items:
- const: iface
- const: core
interrupts:
maxItems: 1
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,lcc-msm8960.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
soc {
#address-cells = <1>;
#size-cells = <1>;
ranges;
slim@28080000 {
compatible = "qcom,apq8064-slim", "qcom,slim";
reg = <0x28080000 0x2000>, <0x80207c 4>;
reg-names = "ctrl", "slew";
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&lcc SLIMBUS_SRC>, <&lcc AUDIO_SLIMBUS_CLK>;
clock-names = "iface", "core";
#address-cells = <2>;
#size-cells = <0>;
audio-codec@1,0 {
compatible = "slim217,60";
reg = <1 0>;
};
};
};

84
Documentation/devicetree/bindings/slimbus/slim-ngd-qcom-ctrl.txt
View file

@ -1,84 +0,0 @@
Qualcomm SLIMBus Non Generic Device (NGD) Controller binding
SLIMBus NGD controller is a light-weight driver responsible for communicating
with SLIMBus slaves directly over the bus using messaging interface and
communicating with master component residing on ADSP for bandwidth and
data-channel management
Please refer to slimbus/bus.txt for details of the common SLIMBus bindings.
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,slim-ngd-v<MAJOR>.<MINOR>.<STEP>"
must be one of the following.
"qcom,slim-ngd-v1.5.0" for MSM8996
"qcom,slim-ngd-v2.1.0" for SDM845
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: must specify the base address and size of the controller
register space.
- dmas
Usage: required
Value type: <array of phandles>
Definition: List of rx and tx dma channels
- dma-names
Usage: required
Value type: <stringlist>
Definition: must be "rx" and "tx".
- interrupts:
Usage: required
Value type: <prop-encoded-array>
Definition: must list controller IRQ.
#address-cells
Usage: required
Value type: <u32>
Definition: Should be 1, reflecting the instance id of ngd.
#size-cells
Usage: required
Value type: <u32>
Definition: Should be 0
= NGD Devices
Each subnode represents an instance of NGD, must contain the following
properties:
- reg:
Usage: required
Value type: <u32>
Definition: Should be instance id of ngd.
#address-cells
Usage: required
Refer to slimbus/bus.txt for details of the common SLIMBus bindings.
#size-cells
Usage: required
Refer to slimbus/bus.txt for details of the common SLIMBus bindings.
= EXAMPLE
slim@91c0000 {
compatible = "qcom,slim-ngd-v1.5.0";
reg = <0x91c0000 0x2c000>;
interrupts = <0 163 0>;
dmas = <&slimbam 3>, <&slimbam 4>;
dma-names = "rx", "tx";
#address-cells = <1>;
#size-cells = <0>;
ngd@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <1>;
codec@1 {
compatible = "slim217,1a0";
reg = <1 0>;
};
};
};

39
Documentation/devicetree/bindings/slimbus/slim-qcom-ctrl.txt
View file

@ -1,39 +0,0 @@
Qualcomm SLIMbus controller
This controller is used if applications processor driver controls SLIMbus
master component.
Required properties:
- #address-cells - refer to Documentation/devicetree/bindings/slimbus/bus.txt
- #size-cells - refer to Documentation/devicetree/bindings/slimbus/bus.txt
- reg : Offset and length of the register region(s) for the device
- reg-names : Register region name(s) referenced in reg above
Required register resource entries are:
"ctrl": Physical address of controller register blocks
"slew": required for "qcom,apq8064-slim" SOC.
- compatible : should be "qcom,<SOC-NAME>-slim" for SOC specific compatible
followed by "qcom,slim" for fallback.
- interrupts : Interrupt number used by this controller
- clocks : Interface and core clocks used by this SLIMbus controller
- clock-names : Required clock-name entries are:
"iface" : Interface clock for this controller
"core" : Interrupt for controller core's BAM
Example:
slim@28080000 {
compatible = "qcom,apq8064-slim", "qcom,slim";
reg = <0x28080000 0x2000>, <0x80207C 4>;
reg-names = "ctrl", "slew";
interrupts = <0 33 0>;
clocks = <&lcc SLIMBUS_SRC>, <&lcc AUDIO_SLIMBUS_CLK>;
clock-names = "iface", "core";
#address-cells = <2>;
#size-cell = <0>;
wcd9310: audio-codec@1,0{
compatible = "slim217,60";
reg = <1 0>;
};
};

95
Documentation/devicetree/bindings/slimbus/slimbus.yaml Normal file
View file

@ -0,0 +1,95 @@
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/slimbus/slimbus.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: SLIM (Serial Low Power Interchip Media) bus
maintainers:
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
description:
SLIMbus is a 2-wire bus, and is used to communicate with peripheral
components like audio-codec.
properties:
$nodename:
pattern: "^slim(@.*|-[0-9a-f])*$"
"#address-cells":
const: 2
"#size-cells":
const: 0
patternProperties:
"^.*@[0-9a-f]+,[0-9a-f]+$":
type: object
description: |
Every SLIMbus controller node can contain zero or more child nodes
representing slave devices on the bus. Every SLIMbus slave device is
uniquely determined by the enumeration address containing 4 fields::
Manufacturer ID, Product code, Device index, and Instance value for the
device.
If child node is not present and it is instantiated after device
discovery (slave device reporting itself present).
In some cases it may be necessary to describe non-probeable device
details such as non-standard ways of powering up a device. In such cases,
child nodes for those devices will be present as slaves of the SLIMbus
controller.
properties:
compatible:
pattern: "^slim[0-9a-f]+,[0-9a-f]+$"
reg:
maxItems: 1
description: |
Pair of (device index, instande ID), where::
- Device index, which uniquely identifies multiple devices within a
single component.
- Instance ID, can be used for the cases where multiple devices of
the same type or class are attached to the bus.
required:
- compatible
- reg
additionalProperties: true
required:
- "#address-cells"
- "#size-cells"
additionalProperties: true
examples:
- |
#include <dt-bindings/clock/qcom,gcc-msm8960.h>
#include <dt-bindings/clock/qcom,lcc-msm8960.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
soc {
#address-cells = <1>;
#size-cells = <1>;
ranges;
slim@28080000 {
compatible = "qcom,apq8064-slim", "qcom,slim";
reg = <0x28080000 0x2000>, <0x80207c 4>;
reg-names = "ctrl", "slew";
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&lcc SLIMBUS_SRC>, <&lcc AUDIO_SLIMBUS_CLK>;
clock-names = "iface", "core";
#address-cells = <2>;
#size-cells = <0>;
audio-codec@1,0 {
compatible = "slim217,60";
reg = <1 0>;
};
};
};

10
Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
View file

@ -85,6 +85,14 @@ properties:
description: > description: >
which of the PMIC Arb provided channels to use for accesses which of the PMIC Arb provided channels to use for accesses
qcom,bus-id:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 1
description: >
SPMI bus instance. only applicable to PMIC arbiter version 7 and beyond.
Supported values, 0 = primary bus, 1 = secondary bus
required: required:
- compatible - compatible
- reg-names - reg-names
@ -113,5 +121,7 @@ examples:
interrupt-controller; interrupt-controller;
#interrupt-cells = <4>; #interrupt-cells = <4>;
qcom,bus-id = <0>;
}; };

2
Documentation/devicetree/bindings/vendor-prefixes.yaml
View file

@ -943,6 +943,8 @@ patternProperties:
description: One Laptop Per Child description: One Laptop Per Child
"^oneplus,.*": "^oneplus,.*":
description: OnePlus Technology (Shenzhen) Co., Ltd. description: OnePlus Technology (Shenzhen) Co., Ltd.
"^onie,.*":
description: Open Network Install Environment group
"^onion,.*": "^onion,.*":
description: Onion Corporation description: Onion Corporation
"^onnn,.*": "^onnn,.*":

41
MAINTAINERS
View file

@ -1152,6 +1152,15 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git
F: drivers/net/amt.c F: drivers/net/amt.c
ANALOG DEVICES INC AD4130 DRIVER
M: Cosmin Tanislav <cosmin.tanislav@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: http://ez.analog.com/community/linux-device-drivers
F: Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130
F: Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml
F: drivers/iio/adc/ad4130.c
ANALOG DEVICES INC AD7192 DRIVER ANALOG DEVICES INC AD7192 DRIVER
M: Alexandru Tachici <alexandru.tachici@analog.com> M: Alexandru Tachici <alexandru.tachici@analog.com>
L: linux-iio@vger.kernel.org L: linux-iio@vger.kernel.org
@ -1201,6 +1210,14 @@ W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml F: Documentation/devicetree/bindings/iio/adc/adi,ad7780.yaml
F: drivers/iio/adc/ad7780.c F: drivers/iio/adc/ad7780.c
ANALOG DEVICES INC AD74115 DRIVER
M: Cosmin Tanislav <cosmin.tanislav@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: http://ez.analog.com/community/linux-device-drivers
F: Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml
F: drivers/iio/addac/ad74115.c
ANALOG DEVICES INC AD74413R DRIVER ANALOG DEVICES INC AD74413R DRIVER
M: Cosmin Tanislav <cosmin.tanislav@analog.com> M: Cosmin Tanislav <cosmin.tanislav@analog.com>
L: linux-iio@vger.kernel.org L: linux-iio@vger.kernel.org
@ -1224,6 +1241,14 @@ W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml F: Documentation/devicetree/bindings/iio/amplifiers/adi,ada4250.yaml
F: drivers/iio/amplifiers/ada4250.c F: drivers/iio/amplifiers/ada4250.c
ANALOG DEVICES INC ADF4377 DRIVER
M: Antoniu Miclaus <antoniu.miclaus@analog.com>
L: linux-iio@vger.kernel.org
S: Supported
W: https://ez.analog.com/linux-software-drivers
F: Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml
F: drivers/iio/frequency/adf4377.c
ANALOG DEVICES INC ADGS1408 DRIVER ANALOG DEVICES INC ADGS1408 DRIVER
M: Mircea Caprioru <mircea.caprioru@analog.com> M: Mircea Caprioru <mircea.caprioru@analog.com>
S: Supported S: Supported
@ -11578,6 +11603,12 @@ F: drivers/mfd/khadas-mcu.c
F: include/linux/mfd/khadas-mcu.h F: include/linux/mfd/khadas-mcu.h
F: drivers/thermal/khadas_mcu_fan.c F: drivers/thermal/khadas_mcu_fan.c
KIONIX/ROHM KX022A ACCELEROMETER
M: Matti Vaittinen <mazziesaccount@gmail.com>
L: linux-iio@vger.kernel.org
S: Supported
F: drivers/iio/accel/kionix-kx022a*
KMEMLEAK KMEMLEAK
M: Catalin Marinas <catalin.marinas@arm.com> M: Catalin Marinas <catalin.marinas@arm.com>
S: Maintained S: Maintained
@ -12657,6 +12688,12 @@ S: Maintained
F: Documentation/devicetree/bindings/regulator/maxim,max20086.yaml F: Documentation/devicetree/bindings/regulator/maxim,max20086.yaml
F: drivers/regulator/max20086-regulator.c F: drivers/regulator/max20086-regulator.c
MAXIM MAX30208 TEMPERATURE SENSOR DRIVER
M: Rajat Khandelwal <rajat.khandelwal@linux.intel.com>
L: linux-iio@vger.kernel.org
S: Maintained
F: drivers/iio/temperature/max30208.c
MAXIM MAX77650 PMIC MFD DRIVER MAXIM MAX77650 PMIC MFD DRIVER
M: Bartosz Golaszewski <brgl@bgdev.pl> M: Bartosz Golaszewski <brgl@bgdev.pl>
L: linux-kernel@vger.kernel.org L: linux-kernel@vger.kernel.org
@ -13566,7 +13603,6 @@ F: arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
MHI BUS MHI BUS
M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
R: Hemant Kumar <quic_hemantk@quicinc.com>
L: mhi@lists.linux.dev L: mhi@lists.linux.dev
L: linux-arm-msm@vger.kernel.org L: linux-arm-msm@vger.kernel.org
S: Maintained S: Maintained
@ -14743,10 +14779,9 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git
F: arch/nios2/ F: arch/nios2/
NITRO ENCLAVES (NE) NITRO ENCLAVES (NE)
M: Andra Paraschiv <andraprs@amazon.com>
M: Alexandru Vasile <lexnv@amazon.com>
M: Alexandru Ciobotaru <alcioa@amazon.com> M: Alexandru Ciobotaru <alcioa@amazon.com>
L: linux-kernel@vger.kernel.org L: linux-kernel@vger.kernel.org
L: The AWS Nitro Enclaves Team <aws-nitro-enclaves-devel@amazon.com>
S: Supported S: Supported
W: https://aws.amazon.com/ec2/nitro/nitro-enclaves/ W: https://aws.amazon.com/ec2/nitro/nitro-enclaves/
F: Documentation/virt/ne_overview.rst F: Documentation/virt/ne_overview.rst

4
drivers/accessibility/speakup/Makefile
View file

@ -40,7 +40,9 @@ hostprogs += makemapdata
makemapdata-objs := makemapdata.o makemapdata-objs := makemapdata.o
quiet_cmd_mkmap = MKMAP $@ quiet_cmd_mkmap = MKMAP $@
cmd_mkmap = TOPDIR=$(srctree) $(obj)/makemapdata > $@ cmd_mkmap = TOPDIR=$(srctree) \
SPKDIR=$(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD),$(srctree)/drivers/accessibility/speakup) \
$(obj)/makemapdata > $@
$(obj)/mapdata.h: $(obj)/makemapdata $(obj)/mapdata.h: $(obj)/makemapdata
$(call cmd,mkmap) $(call cmd,mkmap)

3
drivers/accessibility/speakup/kobjects.c
View file

@ -914,6 +914,8 @@ static struct kobj_attribute say_word_ctl_attribute =
__ATTR(say_word_ctl, 0644, spk_var_show, spk_var_store); __ATTR(say_word_ctl, 0644, spk_var_show, spk_var_store);
static struct kobj_attribute spell_delay_attribute = static struct kobj_attribute spell_delay_attribute =
__ATTR(spell_delay, 0644, spk_var_show, spk_var_store); __ATTR(spell_delay, 0644, spk_var_show, spk_var_store);
static struct kobj_attribute cur_phonetic_attribute =
__ATTR(cur_phonetic, 0644, spk_var_show, spk_var_store);
/* /*
* These attributes are i18n related. * These attributes are i18n related.
@ -967,6 +969,7 @@ static struct attribute *main_attrs[] = {
&say_control_attribute.attr, &say_control_attribute.attr,
&say_word_ctl_attribute.attr, &say_word_ctl_attribute.attr,
&spell_delay_attribute.attr, &spell_delay_attribute.attr,
&cur_phonetic_attribute.attr,
NULL, NULL,
}; };

72
drivers/accessibility/speakup/main.c
View file

@ -65,6 +65,7 @@ int spk_key_echo, spk_say_word_ctl;
int spk_say_ctrl, spk_bell_pos; int spk_say_ctrl, spk_bell_pos;
short spk_punc_mask; short spk_punc_mask;
int spk_punc_level, spk_reading_punc; int spk_punc_level, spk_reading_punc;
int spk_cur_phonetic;
char spk_str_caps_start[MAXVARLEN + 1] = "\0"; char spk_str_caps_start[MAXVARLEN + 1] = "\0";
char spk_str_caps_stop[MAXVARLEN + 1] = "\0"; char spk_str_caps_stop[MAXVARLEN + 1] = "\0";
char spk_str_pause[MAXVARLEN + 1] = "\0"; char spk_str_pause[MAXVARLEN + 1] = "\0";
@ -1268,20 +1269,29 @@ int spk_set_key_info(const u_char *key_info, u_char *k_buffer)
return 0; return 0;
} }
static struct var_t spk_vars[] = { enum spk_vars_id {
BELL_POS_ID = 0, SPELL_DELAY_ID, ATTRIB_BLEEP_ID,
BLEEPS_ID, BLEEP_TIME_ID, PUNC_LEVEL_ID,
READING_PUNC_ID, CURSOR_TIME_ID, SAY_CONTROL_ID,
SAY_WORD_CTL_ID, NO_INTERRUPT_ID, KEY_ECHO_ID,
CUR_PHONETIC_ID, V_LAST_VAR_ID, NB_ID
};
static struct var_t spk_vars[NB_ID] = {
/* bell must be first to set high limit */ /* bell must be first to set high limit */
{BELL_POS, .u.n = {NULL, 0, 0, 0, 0, 0, NULL} }, [BELL_POS_ID] = { BELL_POS, .u.n = {NULL, 0, 0, 0, 0, 0, NULL} },
{SPELL_DELAY, .u.n = {NULL, 0, 0, 4, 0, 0, NULL} }, [SPELL_DELAY_ID] = { SPELL_DELAY, .u.n = {NULL, 0, 0, 4, 0, 0, NULL} },
{ATTRIB_BLEEP, .u.n = {NULL, 1, 0, 3, 0, 0, NULL} }, [ATTRIB_BLEEP_ID] = { ATTRIB_BLEEP, .u.n = {NULL, 1, 0, 3, 0, 0, NULL} },
{BLEEPS, .u.n = {NULL, 3, 0, 3, 0, 0, NULL} }, [BLEEPS_ID] = { BLEEPS, .u.n = {NULL, 3, 0, 3, 0, 0, NULL} },
{BLEEP_TIME, .u.n = {NULL, 30, 1, 200, 0, 0, NULL} }, [BLEEP_TIME_ID] = { BLEEP_TIME, .u.n = {NULL, 30, 1, 200, 0, 0, NULL} },
{PUNC_LEVEL, .u.n = {NULL, 1, 0, 4, 0, 0, NULL} }, [PUNC_LEVEL_ID] = { PUNC_LEVEL, .u.n = {NULL, 1, 0, 4, 0, 0, NULL} },
{READING_PUNC, .u.n = {NULL, 1, 0, 4, 0, 0, NULL} }, [READING_PUNC_ID] = { READING_PUNC, .u.n = {NULL, 1, 0, 4, 0, 0, NULL} },
{CURSOR_TIME, .u.n = {NULL, 120, 50, 600, 0, 0, NULL} }, [CURSOR_TIME_ID] = { CURSOR_TIME, .u.n = {NULL, 120, 50, 600, 0, 0, NULL} },
{SAY_CONTROL, TOGGLE_0}, [SAY_CONTROL_ID] { SAY_CONTROL, TOGGLE_0},
{SAY_WORD_CTL, TOGGLE_0}, [SAY_WORD_CTL_ID] = {SAY_WORD_CTL, TOGGLE_0},
{NO_INTERRUPT, TOGGLE_0}, [NO_INTERRUPT_ID] = { NO_INTERRUPT, TOGGLE_0},
{KEY_ECHO, .u.n = {NULL, 1, 0, 2, 0, 0, NULL} }, [KEY_ECHO_ID] = { KEY_ECHO, .u.n = {NULL, 1, 0, 2, 0, 0, NULL} },
[CUR_PHONETIC_ID] = { CUR_PHONETIC, .u.n = {NULL, 0, 0, 1, 0, 0, NULL} },
V_LAST_VAR V_LAST_VAR
}; };
@ -1712,8 +1722,12 @@ static void cursor_done(struct timer_list *unused)
speakup_win_say(vc); speakup_win_say(vc);
else if (is_cursor == 1 || is_cursor == 4) else if (is_cursor == 1 || is_cursor == 4)
say_line_from_to(vc, 0, vc->vc_cols, 0); say_line_from_to(vc, 0, vc->vc_cols, 0);
else else {
say_char(vc); if (spk_cur_phonetic == 1)
say_phonetic_char(vc);
else
say_char(vc);
}
spk_keydown = 0; spk_keydown = 0;
is_cursor = 0; is_cursor = 0;
out: out:
@ -2453,5 +2467,33 @@ out:
return err; return err;
} }
module_param_named(bell_pos, spk_vars[BELL_POS_ID].u.n.default_val, int, 0444);
module_param_named(spell_delay, spk_vars[SPELL_DELAY_ID].u.n.default_val, int, 0444);
module_param_named(attrib_bleep, spk_vars[ATTRIB_BLEEP_ID].u.n.default_val, int, 0444);
module_param_named(bleeps, spk_vars[BLEEPS_ID].u.n.default_val, int, 0444);
module_param_named(bleep_time, spk_vars[BLEEP_TIME_ID].u.n.default_val, int, 0444);
module_param_named(punc_level, spk_vars[PUNC_LEVEL_ID].u.n.default_val, int, 0444);
module_param_named(reading_punc, spk_vars[READING_PUNC_ID].u.n.default_val, int, 0444);
module_param_named(cursor_time, spk_vars[CURSOR_TIME_ID].u.n.default_val, int, 0444);
module_param_named(say_control, spk_vars[SAY_CONTROL_ID].u.n.default_val, int, 0444);
module_param_named(say_word_ctl, spk_vars[SAY_WORD_CTL_ID].u.n.default_val, int, 0444);
module_param_named(no_interrupt, spk_vars[NO_INTERRUPT_ID].u.n.default_val, int, 0444);
module_param_named(key_echo, spk_vars[KEY_ECHO_ID].u.n.default_val, int, 0444);
module_param_named(cur_phonetic, spk_vars[CUR_PHONETIC_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(bell_pos, "This works much like a typewriter bell. If for example 72 is echoed to bell_pos, it will beep the PC speaker when typing on a line past character 72.");
MODULE_PARM_DESC(spell_delay, "This controls how fast a word is spelled when speakup's spell word review command is pressed.");
MODULE_PARM_DESC(attrib_bleep, "Beeps the PC speaker when there is an attribute change such as background color when using speakup review commands. One = on, zero = off.");
MODULE_PARM_DESC(bleeps, "This controls whether one hears beeps through the PC speaker when using speakup review commands.");
MODULE_PARM_DESC(bleep_time, "This controls the duration of the PC speaker beeps speakup produces.");
MODULE_PARM_DESC(punc_level, "Controls the level of punctuation spoken as the screen is displayed, not reviewed.");
MODULE_PARM_DESC(reading_punc, "It controls the level of punctuation when reviewing the screen with speakup's screen review commands.");
MODULE_PARM_DESC(cursor_time, "This controls cursor delay when using arrow keys.");
MODULE_PARM_DESC(say_control, "This controls if speakup speaks shift, alt and control when those keys are pressed or not.");
MODULE_PARM_DESC(say_word_ctl, "Sets thw say_word_ctl on load.");
MODULE_PARM_DESC(no_interrupt, "Controls if typing interrupts output from speakup.");
MODULE_PARM_DESC(key_echo, "Controls if speakup speaks keys when they are typed. One = on zero = off or don't echo keys.");
MODULE_PARM_DESC(cur_phonetic, "Controls if speakup speaks letters phonetically during navigation. One = on zero = off or don't speak phonetically.");
module_init(speakup_init); module_init(speakup_init);
module_exit(speakup_exit); module_exit(speakup_exit);

7
drivers/accessibility/speakup/makemapdata.c
View file

@ -51,12 +51,15 @@ main(int argc, char *argv[])
{ {
int value, i; int value, i;
struct st_key *this; struct st_key *this;
const char *dir_name; const char *dir_name, *spk_dir_name;
char *cp; char *cp;
dir_name = getenv("TOPDIR"); dir_name = getenv("TOPDIR");
if (!dir_name) if (!dir_name)
dir_name = "."; dir_name = ".";
spk_dir_name = getenv("SPKDIR");
if (!spk_dir_name)
spk_dir_name = "drivers/accessibility/speakup";
bzero(key_table, sizeof(key_table)); bzero(key_table, sizeof(key_table));
add_key("shift", 1, is_shift); add_key("shift", 1, is_shift);
add_key("altgr", 2, is_shift); add_key("altgr", 2, is_shift);
@ -83,7 +86,7 @@ main(int argc, char *argv[])
add_key(def_name, value, is_input); add_key(def_name, value, is_input);
} }
open_input(dir_name, "drivers/accessibility/speakup/spk_priv_keyinfo.h"); open_input(spk_dir_name, "spk_priv_keyinfo.h");
while (get_define()) { while (get_define()) {
if (strlen(def_val) > 5) { if (strlen(def_val) > 5) {
//if (def_val[0] == '(') //if (def_val[0] == '(')

1
drivers/accessibility/speakup/speakup.h
View file

@ -105,6 +105,7 @@ extern int spk_no_intr, spk_say_ctrl, spk_say_word_ctl, spk_punc_level;
extern int spk_reading_punc, spk_attrib_bleep, spk_bleeps; extern int spk_reading_punc, spk_attrib_bleep, spk_bleeps;
extern int spk_bleep_time, spk_bell_pos; extern int spk_bleep_time, spk_bell_pos;
extern int spk_spell_delay, spk_key_echo; extern int spk_spell_delay, spk_key_echo;
extern int spk_cur_phonetic;
extern short spk_punc_mask; extern short spk_punc_mask;
extern short spk_pitch_shift, synth_flags; extern short spk_pitch_shift, synth_flags;
extern bool spk_quiet_boot; extern bool spk_quiet_boot;

38
drivers/accessibility/speakup/speakup_acntpc.c
View file

@ -34,14 +34,23 @@ static int synth_port_control;
static int port_forced; static int port_forced;
static unsigned int synth_portlist[] = { 0x2a8, 0 }; static unsigned int synth_portlist[] = { 0x2a8, 0 };
static struct var_t vars[] = { enum default_vars_id {
{ CAPS_START, .u.s = {"\033P8" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ CAPS_STOP, .u.s = {"\033P5" } }, RATE_ID, PITCH_ID,
{ RATE, .u.n = {"\033R%c", 9, 0, 17, 0, 0, "0123456789abcdefgh" } }, VOL_ID, TONE_ID,
{ PITCH, .u.n = {"\033P%d", 5, 0, 9, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ VOL, .u.n = {"\033A%d", 5, 0, 9, 0, 0, NULL } }, NB_ID
{ TONE, .u.n = {"\033V%d", 5, 0, 9, 0, 0, NULL } }, };
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"\033P8" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\033P5" } },
[RATE_ID] = { RATE, .u.n = {"\033R%c", 9, 0, 17, 0, 0, "0123456789abcdefgh" } },
[PITCH_ID] = { PITCH, .u.n = {"\033P%d", 5, 0, 9, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\033A%d", 5, 0, 9, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\033V%d", 5, 0, 9, 0, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -305,9 +314,22 @@ static void accent_release(struct spk_synth *synth)
module_param_hw_named(port, port_forced, int, ioport, 0444); module_param_hw_named(port, port_forced, int, ioport, 0444);
module_param_named(start, synth_acntpc.startup, short, 0444); module_param_named(start, synth_acntpc.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing)."); MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_acntpc); module_spk_synth(synth_acntpc);

37
drivers/accessibility/speakup/speakup_acntsa.c
View file

@ -19,14 +19,24 @@
static int synth_probe(struct spk_synth *synth); static int synth_probe(struct spk_synth *synth);
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"\033P8" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"\033P5" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ RATE, .u.n = {"\033R%c", 9, 0, 17, 0, 0, "0123456789abcdefgh" } }, RATE_ID, PITCH_ID,
{ PITCH, .u.n = {"\033P%d", 5, 0, 9, 0, 0, NULL } }, VOL_ID, TONE_ID,
{ VOL, .u.n = {"\033A%d", 9, 0, 9, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ TONE, .u.n = {"\033V%d", 5, 0, 9, 0, 0, NULL } }, NB_ID
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, };
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"\033P8" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\033P5" } },
[RATE_ID] = { RATE, .u.n = {"\033R%c", 9, 0, 17, 0, 0, "0123456789abcdefgh" } },
[PITCH_ID] = { PITCH, .u.n = {"\033P%d", 5, 0, 9, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\033A%d", 9, 0, 9, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\033V%d", 5, 0, 9, 0, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -129,10 +139,21 @@ static int synth_probe(struct spk_synth *synth)
module_param_named(ser, synth_acntsa.ser, int, 0444); module_param_named(ser, synth_acntsa.ser, int, 0444);
module_param_named(dev, synth_acntsa.dev_name, charp, 0444); module_param_named(dev, synth_acntsa.dev_name, charp, 0444);
module_param_named(start, synth_acntsa.startup, short, 0444); module_param_named(start, synth_acntsa.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_acntsa); module_spk_synth(synth_acntsa);

46
drivers/accessibility/speakup/speakup_apollo.c
View file

@ -24,15 +24,28 @@
static void do_catch_up(struct spk_synth *synth); static void do_catch_up(struct spk_synth *synth);
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"cap, " } },
{ CAPS_STOP, .u.s = {"" } }, enum default_vars_id {
{ RATE, .u.n = {"@W%d", 6, 1, 9, 0, 0, NULL } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ PITCH, .u.n = {"@F%x", 10, 0, 15, 0, 0, NULL } }, RATE_ID, PITCH_ID,
{ VOL, .u.n = {"@A%x", 10, 0, 15, 0, 0, NULL } }, VOL_ID, VOICE_ID, LANG_ID,
{ VOICE, .u.n = {"@V%d", 1, 1, 6, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ LANG, .u.n = {"@=%d,", 1, 1, 4, 0, 0, NULL } }, NB_ID
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, };
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"cap, " } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"" } },
[RATE_ID] = { RATE, .u.n = {"@W%d", 6, 1, 9, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"@F%x", 10, 0, 15, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"@A%x", 10, 0, 15, 0, 0, NULL } },
[VOICE_ID] = { VOICE, .u.n = {"@V%d", 1, 1, 6, 0, 0, NULL } },
[LANG_ID] = { LANG, .u.n = {"@=%d,", 1, 1, 4, 0, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -193,10 +206,25 @@ static void do_catch_up(struct spk_synth *synth)
module_param_named(ser, synth_apollo.ser, int, 0444); module_param_named(ser, synth_apollo.ser, int, 0444);
module_param_named(dev, synth_apollo.dev_name, charp, 0444); module_param_named(dev, synth_apollo.dev_name, charp, 0444);
module_param_named(start, synth_apollo.startup, short, 0444); module_param_named(start, synth_apollo.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(voice, vars[VOICE_ID].u.n.default_val, int, 0444);
module_param_named(lang, vars[LANG_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(voice, "Set the voice variable on load.");
MODULE_PARM_DESC(lang, "Set the lang variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_apollo); module_spk_synth(synth_apollo);

42
drivers/accessibility/speakup/speakup_audptr.c
View file

@ -19,15 +19,24 @@
static int synth_probe(struct spk_synth *synth); static int synth_probe(struct spk_synth *synth);
static void synth_flush(struct spk_synth *synth); static void synth_flush(struct spk_synth *synth);
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"\x05[f99]" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"\x05[f80]" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ RATE, .u.n = {"\x05[r%d]", 10, 0, 20, 100, -10, NULL } }, RATE_ID, PITCH_ID,
{ PITCH, .u.n = {"\x05[f%d]", 80, 39, 4500, 0, 0, NULL } }, VOL_ID, TONE_ID, PUNCT_ID,
{ VOL, .u.n = {"\x05[g%d]", 21, 0, 40, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ TONE, .u.n = {"\x05[s%d]", 9, 0, 63, 0, 0, NULL } }, NB_ID
{ PUNCT, .u.n = {"\x05[A%c]", 0, 0, 3, 0, 0, "nmsa" } }, };
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"\x05[f99]" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\x05[f80]" } },
[RATE_ID] = { RATE, .u.n = {"\x05[r%d]", 10, 0, 20, 100, -10, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"\x05[f%d]", 80, 39, 4500, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\x05[g%d]", 21, 0, 40, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\x05[s%d]", 9, 0, 63, 0, 0, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"\x05[A%c]", 0, 0, 3, 0, 0, "nmsa" } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -158,10 +167,25 @@ static int synth_probe(struct spk_synth *synth)
module_param_named(ser, synth_audptr.ser, int, 0444); module_param_named(ser, synth_audptr.ser, int, 0444);
module_param_named(dev, synth_audptr.dev_name, charp, 0444); module_param_named(dev, synth_audptr.dev_name, charp, 0444);
module_param_named(start, synth_audptr.startup, short, 0444); module_param_named(start, synth_audptr.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(punct, "Set the punct variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_audptr); module_spk_synth(synth_audptr);

36
drivers/accessibility/speakup/speakup_bns.c
View file

@ -16,14 +16,23 @@
#define SYNTH_CLEAR 0x18 #define SYNTH_CLEAR 0x18
#define PROCSPEECH '\r' #define PROCSPEECH '\r'
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"\x05\x31\x32P" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"\x05\x38P" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ RATE, .u.n = {"\x05%dE", 8, 1, 16, 0, 0, NULL } }, RATE_ID, PITCH_ID,
{ PITCH, .u.n = {"\x05%dP", 8, 0, 16, 0, 0, NULL } }, VOL_ID, TONE_ID,
{ VOL, .u.n = {"\x05%dV", 8, 0, 16, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ TONE, .u.n = {"\x05%dT", 8, 0, 16, 0, 0, NULL } }, NB_ID
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, };
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"\x05\x31\x32P" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\x05\x38P" } },
[RATE_ID] = { RATE, .u.n = {"\x05%dE", 8, 1, 16, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"\x05%dP", 8, 0, 16, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\x05%dV", 8, 0, 16, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\x05%dT", 8, 0, 16, 0, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -113,10 +122,21 @@ static struct spk_synth synth_bns = {
module_param_named(ser, synth_bns.ser, int, 0444); module_param_named(ser, synth_bns.ser, int, 0444);
module_param_named(dev, synth_bns.dev_name, charp, 0444); module_param_named(dev, synth_bns.dev_name, charp, 0444);
module_param_named(start, synth_bns.startup, short, 0444); module_param_named(start, synth_bns.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_bns); module_spk_synth(synth_bns);

44
drivers/accessibility/speakup/speakup_decext.c
View file

@ -38,16 +38,25 @@ static void synth_flush(struct spk_synth *synth);
static int in_escape; static int in_escape;
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"[:dv ap 222]" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"[:dv ap 100]" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ RATE, .u.n = {"[:ra %d]", 7, 0, 9, 150, 25, NULL } }, RATE_ID, PITCH_ID, INFLECTION_ID,
{ PITCH, .u.n = {"[:dv ap %d]", 100, 0, 100, 0, 0, NULL } }, VOL_ID, PUNCT_ID, VOICE_ID,
{ INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } }, DIRECT_ID, V_LAST_ID,
{ VOL, .u.n = {"[:dv gv %d]", 13, 0, 16, 0, 5, NULL } }, NB_ID,
{ PUNCT, .u.n = {"[:pu %c]", 0, 0, 2, 0, 0, "nsa" } }, };
{ VOICE, .u.n = {"[:n%c]", 0, 0, 9, 0, 0, "phfdburwkv" } },
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"[:dv ap 222]" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"[:dv ap 100]" } },
[RATE_ID] = { RATE, .u.n = {"[:ra %d]", 7, 0, 9, 150, 25, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"[:dv ap %d]", 100, 0, 100, 0, 0, NULL } },
[INFLECTION_ID] = { INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"[:dv gv %d]", 13, 0, 16, 0, 5, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"[:pu %c]", 0, 0, 2, 0, 0, "nsa" } },
[VOICE_ID] = { VOICE, .u.n = {"[:n%c]", 0, 0, 9, 0, 0, "phfdburwkv" } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -225,10 +234,25 @@ static void synth_flush(struct spk_synth *synth)
module_param_named(ser, synth_decext.ser, int, 0444); module_param_named(ser, synth_decext.ser, int, 0444);
module_param_named(dev, synth_decext.dev_name, charp, 0444); module_param_named(dev, synth_decext.dev_name, charp, 0444);
module_param_named(start, synth_decext.startup, short, 0444); module_param_named(start, synth_decext.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(inflection, vars[INFLECTION_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(voice, vars[VOICE_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(inflection, "Set the inflection variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(punct, "Set the punct variable on load.");
MODULE_PARM_DESC(voice, "Set the voice variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_decext); module_spk_synth(synth_decext);

48
drivers/accessibility/speakup/speakup_decpc.c
View file

@ -134,16 +134,27 @@ static int synth_portlist[] = { 0x340, 0x350, 0x240, 0x250, 0 };
static int in_escape, is_flushing; static int in_escape, is_flushing;
static int dt_stat, dma_state; static int dt_stat, dma_state;
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"[:dv ap 200]" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"[:dv ap 100]" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ RATE, .u.n = {"[:ra %d]", 9, 0, 18, 150, 25, NULL } }, RATE_ID, PITCH_ID, INFLECTION_ID,
{ PITCH, .u.n = {"[:dv ap %d]", 80, 0, 100, 20, 0, NULL } }, VOL_ID, PUNCT_ID, VOICE_ID,
{ INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ VOL, .u.n = {"[:vo se %d]", 5, 0, 9, 5, 10, NULL } }, NB_ID,
{ PUNCT, .u.n = {"[:pu %c]", 0, 0, 2, 0, 0, "nsa" } }, };
{ VOICE, .u.n = {"[:n%c]", 0, 0, 9, 0, 0, "phfdburwkv" } },
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"[:dv ap 200]" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"[:dv ap 100]" } },
[RATE_ID] = { RATE, .u.n = {"[:ra %d]", 9, 0, 18, 150, 25, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"[:dv ap %d]", 80, 0, 100, 20, 0, NULL } },
[INFLECTION_ID] = { INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"[:vo se %d]", 5, 0, 9, 5, 10, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"[:pu %c]", 0, 0, 2, 0, 0, "nsa" } },
[VOICE_ID] = { VOICE, .u.n = {"[:n%c]", 0, 0, 9, 0, 0, "phfdburwkv" } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -483,8 +494,25 @@ static void dtpc_release(struct spk_synth *synth)
} }
module_param_named(start, synth_dec_pc.startup, short, 0444); module_param_named(start, synth_dec_pc.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(inflection, vars[INFLECTION_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(voice, vars[VOICE_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(inflection, "Set the inflection variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(punct, "Set the punct variable on load.");
MODULE_PARM_DESC(voice, "Set the voice variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_dec_pc); module_spk_synth(synth_dec_pc);

45
drivers/accessibility/speakup/speakup_dectlk.c
View file

@ -40,16 +40,24 @@ static int is_flushing;
static DEFINE_SPINLOCK(flush_lock); static DEFINE_SPINLOCK(flush_lock);
static DECLARE_WAIT_QUEUE_HEAD(flush); static DECLARE_WAIT_QUEUE_HEAD(flush);
static struct var_t vars[] = { enum default_vars_id {
{ CAPS_START, .u.s = {"[:dv ap 160] " } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ CAPS_STOP, .u.s = {"[:dv ap 100 ] " } }, RATE_ID, PITCH_ID, INFLECTION_ID,
{ RATE, .u.n = {"[:ra %d] ", 180, 75, 650, 0, 0, NULL } }, VOL_ID, PUNCT_ID, VOICE_ID,
{ PITCH, .u.n = {"[:dv ap %d] ", 122, 50, 350, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } }, NB_ID,
{ VOL, .u.n = {"[:dv g5 %d] ", 86, 60, 86, 0, 0, NULL } }, };
{ PUNCT, .u.n = {"[:pu %c] ", 0, 0, 2, 0, 0, "nsa" } },
{ VOICE, .u.n = {"[:n%c] ", 0, 0, 9, 0, 0, "phfdburwkv" } }, static struct var_t vars[NB_ID] = {
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, [CAPS_START_ID] = { CAPS_START, .u.s = {"[:dv ap 160] " } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"[:dv ap 100 ] " } },
[RATE_ID] = { RATE, .u.n = {"[:ra %d] ", 180, 75, 650, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"[:dv ap %d] ", 122, 50, 350, 0, 0, NULL } },
[INFLECTION_ID] = { INFLECTION, .u.n = {"[:dv pr %d] ", 100, 0, 10000, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"[:dv g5 %d] ", 86, 60, 86, 0, 0, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"[:pu %c] ", 0, 0, 2, 0, 0, "nsa" } },
[VOICE_ID] = { VOICE, .u.n = {"[:n%c] ", 0, 0, 9, 0, 0, "phfdburwkv" } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -306,10 +314,27 @@ static void synth_flush(struct spk_synth *synth)
module_param_named(ser, synth_dectlk.ser, int, 0444); module_param_named(ser, synth_dectlk.ser, int, 0444);
module_param_named(dev, synth_dectlk.dev_name, charp, 0444); module_param_named(dev, synth_dectlk.dev_name, charp, 0444);
module_param_named(start, synth_dectlk.startup, short, 0444); module_param_named(start, synth_dectlk.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(inflection, vars[INFLECTION_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(voice, vars[VOICE_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(inflection, "Set the inflection variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(punct, "Set the punct variable on load.");
MODULE_PARM_DESC(voice, "Set the voice variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_dectlk); module_spk_synth(synth_dectlk);

50
drivers/accessibility/speakup/speakup_dtlk.c
View file

@ -37,17 +37,27 @@ static unsigned int synth_portlist[] = {
static u_char synth_status; static u_char synth_status;
static struct var_t vars[] = { enum default_vars_id {
{ CAPS_START, .u.s = {"\x01+35p" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ CAPS_STOP, .u.s = {"\x01-35p" } }, RATE_ID, PITCH_ID,
{ RATE, .u.n = {"\x01%ds", 8, 0, 9, 0, 0, NULL } }, VOL_ID, TONE_ID, PUNCT_ID,
{ PITCH, .u.n = {"\x01%dp", 50, 0, 99, 0, 0, NULL } }, VOICE_ID, FREQUENCY_ID,
{ VOL, .u.n = {"\x01%dv", 5, 0, 9, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ TONE, .u.n = {"\x01%dx", 1, 0, 2, 0, 0, NULL } }, NB_ID,
{ PUNCT, .u.n = {"\x01%db", 7, 0, 15, 0, 0, NULL } }, };
{ VOICE, .u.n = {"\x01%do", 0, 0, 7, 0, 0, NULL } },
{ FREQUENCY, .u.n = {"\x01%df", 5, 0, 9, 0, 0, NULL } },
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"\x01+35p" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\x01-35p" } },
[RATE_ID] = { RATE, .u.n = {"\x01%ds", 8, 0, 9, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"\x01%dp", 50, 0, 99, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\x01%dv", 5, 0, 9, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\x01%dx", 1, 0, 2, 0, 0, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"\x01%db", 7, 0, 15, 0, 0, NULL } },
[VOICE_ID] = { VOICE, .u.n = {"\x01%do", 0, 0, 7, 0, 0, NULL } },
[FREQUENCY_ID] = { FREQUENCY, .u.n = {"\x01%df", 5, 0, 9, 0, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -376,9 +386,27 @@ static void dtlk_release(struct spk_synth *synth)
module_param_hw_named(port, port_forced, int, ioport, 0444); module_param_hw_named(port, port_forced, int, ioport, 0444);
module_param_named(start, synth_dtlk.startup, short, 0444); module_param_named(start, synth_dtlk.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(voice, vars[VOICE_ID].u.n.default_val, int, 0444);
module_param_named(frequency, vars[FREQUENCY_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing)."); MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(punct, "Set the punct variable on load.");
MODULE_PARM_DESC(voice, "Set the voice variable on load.");
MODULE_PARM_DESC(frequency, "Set the frequency variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_dtlk); module_spk_synth(synth_dtlk);

53
drivers/accessibility/speakup/speakup_dummy.c
View file

@ -18,17 +18,30 @@
#define DRV_VERSION "2.11" #define DRV_VERSION "2.11"
#define SYNTH_CLEAR '!' #define SYNTH_CLEAR '!'
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"CAPS_START\n" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"CAPS_STOP\n" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ PAUSE, .u.s = {"PAUSE\n"} }, PAUSE_ID,
{ RATE, .u.n = {"RATE %d\n", 8, 1, 16, 0, 0, NULL } }, RATE_ID, PITCH_ID, INFLECTION_ID,
{ PITCH, .u.n = {"PITCH %d\n", 8, 0, 16, 0, 0, NULL } }, VOL_ID, TONE_ID, PUNCT_ID,
{ INFLECTION, .u.n = {"INFLECTION %d\n", 8, 0, 16, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ VOL, .u.n = {"VOL %d\n", 8, 0, 16, 0, 0, NULL } }, NB_ID
{ TONE, .u.n = {"TONE %d\n", 8, 0, 16, 0, 0, NULL } }, };
{ PUNCT, .u.n = {"PUNCT %d\n", 0, 0, 3, 0, 0, NULL } },
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"CAPS_START\n" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"CAPS_STOP\n" } },
[PAUSE_ID] = { PAUSE, .u.s = {"PAUSE\n"} },
[RATE_ID] = { RATE, .u.n = {"RATE %d\n", 8, 1, 16, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"PITCH %d\n", 8, 0, 16, 0, 0, NULL } },
[INFLECTION_ID] = { INFLECTION, .u.n = {"INFLECTION %d\n", 8, 0, 16, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"VOL %d\n", 8, 0, 16, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"TONE %d\n", 8, 0, 16, 0, 0, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"PUNCT %d\n", 0, 0, 3, 0, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -129,10 +142,28 @@ static struct spk_synth synth_dummy = {
module_param_named(ser, synth_dummy.ser, int, 0444); module_param_named(ser, synth_dummy.ser, int, 0444);
module_param_named(dev, synth_dummy.dev_name, charp, 0444); module_param_named(dev, synth_dummy.dev_name, charp, 0444);
module_param_named(start, synth_dummy.startup, short, 0444); module_param_named(start, synth_dummy.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(inflection, vars[INFLECTION_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(inflection, "Set the inflection variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(punct, "Set the punct variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_dummy); module_spk_synth(synth_dummy);

29
drivers/accessibility/speakup/speakup_keypc.c
View file

@ -33,12 +33,21 @@ static int synth_port;
static int port_forced; static int port_forced;
static unsigned int synth_portlist[] = { 0x2a8, 0 }; static unsigned int synth_portlist[] = { 0x2a8, 0 };
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"[f130]" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"[f90]" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ RATE, .u.n = {"\04%c ", 8, 0, 10, 81, -8, NULL } }, RATE_ID, PITCH_ID,
{ PITCH, .u.n = {"[f%d]", 5, 0, 9, 40, 10, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, NB_ID
};
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"[f130]" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"[f90]" } },
[RATE_ID] = { RATE, .u.n = {"\04%c ", 8, 0, 10, 81, -8, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"[f%d]", 5, 0, 9, 40, 10, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -305,9 +314,17 @@ static void keynote_release(struct spk_synth *synth)
module_param_hw_named(port, port_forced, int, ioport, 0444); module_param_hw_named(port, port_forced, int, ioport, 0444);
module_param_named(start, synth_keypc.startup, short, 0444); module_param_named(start, synth_keypc.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing)."); MODULE_PARM_DESC(port, "Set the port for the synthesizer (override probing).");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_keypc); module_spk_synth(synth_keypc);

53
drivers/accessibility/speakup/speakup_ltlk.c
View file

@ -18,17 +18,28 @@
static int synth_probe(struct spk_synth *synth); static int synth_probe(struct spk_synth *synth);
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"\x01+35p" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"\x01-35p" } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ RATE, .u.n = {"\x01%ds", 8, 0, 9, 0, 0, NULL } }, RATE_ID, PITCH_ID,
{ PITCH, .u.n = {"\x01%dp", 50, 0, 99, 0, 0, NULL } }, VOL_ID, TONE_ID, PUNCT_ID,
{ VOL, .u.n = {"\x01%dv", 5, 0, 9, 0, 0, NULL } }, VOICE_ID, FREQUENCY_ID,
{ TONE, .u.n = {"\x01%dx", 1, 0, 2, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ PUNCT, .u.n = {"\x01%db", 7, 0, 15, 0, 0, NULL } }, NB_ID
{ VOICE, .u.n = {"\x01%do", 0, 0, 7, 0, 0, NULL } }, };
{ FREQUENCY, .u.n = {"\x01%df", 5, 0, 9, 0, 0, NULL } },
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"\x01+35p" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\x01-35p" } },
[RATE_ID] = { RATE, .u.n = {"\x01%ds", 8, 0, 9, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"\x01%dp", 50, 0, 99, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\x01%dv", 5, 0, 9, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\x01%dx", 1, 0, 2, 0, 0, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"\x01%db", 7, 0, 15, 0, 0, NULL } },
[VOICE_ID] = { VOICE, .u.n = {"\x01%do", 0, 0, 7, 0, 0, NULL } },
[FREQUENCY_ID] = { FREQUENCY, .u.n = {"\x01%df", 5, 0, 9, 0, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -160,10 +171,30 @@ static int synth_probe(struct spk_synth *synth)
module_param_named(ser, synth_ltlk.ser, int, 0444); module_param_named(ser, synth_ltlk.ser, int, 0444);
module_param_named(dev, synth_ltlk.dev_name, charp, 0444); module_param_named(dev, synth_ltlk.dev_name, charp, 0444);
module_param_named(start, synth_ltlk.startup, short, 0444); module_param_named(start, synth_ltlk.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(voice, vars[VOICE_ID].u.n.default_val, int, 0444);
module_param_named(frequency, vars[FREQUENCY_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(punct, "Set the punct variable on load.");
MODULE_PARM_DESC(voice, "Set the voice variable on load.");
MODULE_PARM_DESC(frequency, "Set the frequency variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_ltlk); module_spk_synth(synth_ltlk);

57
drivers/accessibility/speakup/speakup_soft.c
View file

@ -33,21 +33,30 @@ static struct miscdevice synth_device, synthu_device;
static int init_pos; static int init_pos;
static int misc_registered; static int misc_registered;
static struct var_t vars[] = {
/* DIRECT is put first so that module_param_named can access it easily */
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
{ CAPS_START, .u.s = {"\x01+3p" } }, enum default_vars_id {
{ CAPS_STOP, .u.s = {"\x01-3p" } }, DIRECT_ID = 0, CAPS_START_ID, CAPS_STOP_ID,
{ PAUSE, .u.n = {"\x01P" } }, PAUSE_ID, RATE_ID, PITCH_ID, INFLECTION_ID,
{ RATE, .u.n = {"\x01%ds", 2, 0, 9, 0, 0, NULL } }, VOL_ID, TONE_ID, PUNCT_ID, VOICE_ID,
{ PITCH, .u.n = {"\x01%dp", 5, 0, 9, 0, 0, NULL } }, FREQUENCY_ID, V_LAST_VAR_ID,
{ INFLECTION, .u.n = {"\x01%dr", 5, 0, 9, 0, 0, NULL } }, NB_ID
{ VOL, .u.n = {"\x01%dv", 5, 0, 9, 0, 0, NULL } }, };
{ TONE, .u.n = {"\x01%dx", 1, 0, 2, 0, 0, NULL } },
{ PUNCT, .u.n = {"\x01%db", 0, 0, 3, 0, 0, NULL } },
{ VOICE, .u.n = {"\x01%do", 0, 0, 7, 0, 0, NULL } }, static struct var_t vars[NB_ID] = {
{ FREQUENCY, .u.n = {"\x01%df", 5, 0, 9, 0, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
[CAPS_START_ID] = { CAPS_START, .u.s = {"\x01+3p" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\x01-3p" } },
[PAUSE_ID] = { PAUSE, .u.n = {"\x01P" } },
[RATE_ID] = { RATE, .u.n = {"\x01%ds", 2, 0, 9, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"\x01%dp", 5, 0, 9, 0, 0, NULL } },
[INFLECTION_ID] = { INFLECTION, .u.n = {"\x01%dr", 5, 0, 9, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\x01%dv", 5, 0, 9, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\x01%dx", 1, 0, 2, 0, 0, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"\x01%db", 0, 0, 3, 0, 0, NULL } },
[VOICE_ID] = { VOICE, .u.n = {"\x01%do", 0, 0, 7, 0, 0, NULL } },
[FREQUENCY_ID] = { FREQUENCY, .u.n = {"\x01%df", 5, 0, 9, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -451,10 +460,28 @@ static int softsynth_adjust(struct spk_synth *synth, struct st_var_header *var)
} }
module_param_named(start, synth_soft.startup, short, 0444); module_param_named(start, synth_soft.startup, short, 0444);
module_param_named(direct, vars[0].u.n.default_val, int, 0444); module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(inflection, vars[INFLECTION_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(voice, vars[VOICE_ID].u.n.default_val, int, 0444);
module_param_named(frequency, vars[FREQUENCY_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(direct, "Set the direct variable on load."); MODULE_PARM_DESC(direct, "Set the direct variable on load.");
MODULE_PARM_DESC(rate, "Sets the rate of the synthesizer.");
MODULE_PARM_DESC(pitch, "Sets the pitch of the synthesizer.");
MODULE_PARM_DESC(inflection, "Sets the inflection of the synthesizer.");
MODULE_PARM_DESC(vol, "Sets the volume of the speech synthesizer.");
MODULE_PARM_DESC(tone, "Sets the tone of the speech synthesizer.");
MODULE_PARM_DESC(punct, "Sets the amount of punctuation spoken by the synthesizer.");
MODULE_PARM_DESC(voice, "Sets the voice used by the synthesizer.");
MODULE_PARM_DESC(frequency, "Sets the frequency of speech synthesizer.");
module_spk_synth(synth_soft); module_spk_synth(synth_soft);

43
drivers/accessibility/speakup/speakup_spkout.c
View file

@ -18,15 +18,26 @@
static void synth_flush(struct spk_synth *synth); static void synth_flush(struct spk_synth *synth);
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"\x05P+" } },
{ CAPS_STOP, .u.s = {"\x05P-" } }, enum default_vars_id {
{ RATE, .u.n = {"\x05R%d", 7, 0, 9, 0, 0, NULL } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ PITCH, .u.n = {"\x05P%d", 3, 0, 9, 0, 0, NULL } }, RATE_ID, PITCH_ID,
{ VOL, .u.n = {"\x05V%d", 9, 0, 9, 0, 0, NULL } }, VOL_ID, TONE_ID, PUNCT_ID,
{ TONE, .u.n = {"\x05T%c", 8, 0, 25, 65, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
{ PUNCT, .u.n = {"\x05M%c", 0, 0, 3, 0, 0, "nsma" } }, NB_ID
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, };
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"\x05P+" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\x05P-" } },
[RATE_ID] = { RATE, .u.n = {"\x05R%d", 7, 0, 9, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"\x05P%d", 3, 0, 9, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\x05V%d", 9, 0, 9, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\x05T%c", 8, 0, 25, 65, 0, NULL } },
[PUNCT_ID] = { PUNCT, .u.n = {"\x05M%c", 0, 0, 3, 0, 0, "nsma" } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -124,10 +135,24 @@ static void synth_flush(struct spk_synth *synth)
module_param_named(ser, synth_spkout.ser, int, 0444); module_param_named(ser, synth_spkout.ser, int, 0444);
module_param_named(dev, synth_spkout.dev_name, charp, 0444); module_param_named(dev, synth_spkout.dev_name, charp, 0444);
module_param_named(start, synth_spkout.startup, short, 0444); module_param_named(start, synth_spkout.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(punct, vars[PUNCT_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(punct, "Set the punct variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_spkout); module_spk_synth(synth_spkout);

45
drivers/accessibility/speakup/speakup_txprt.c
View file

@ -16,14 +16,29 @@
#define SYNTH_CLEAR 0x18 #define SYNTH_CLEAR 0x18
#define PROCSPEECH '\r' /* process speech char */ #define PROCSPEECH '\r' /* process speech char */
static struct var_t vars[] = {
{ CAPS_START, .u.s = {"\x05P8" } },
{ CAPS_STOP, .u.s = {"\x05P5" } },
{ RATE, .u.n = {"\x05R%d", 5, 0, 9, 0, 0, NULL } }, enum default_vars_id {
{ PITCH, .u.n = {"\x05P%d", 5, 0, 9, 0, 0, NULL } }, CAPS_START_ID = 0, CAPS_STOP_ID,
{ VOL, .u.n = {"\x05V%d", 5, 0, 9, 0, 0, NULL } }, RATE_ID, PITCH_ID,
{ TONE, .u.n = {"\x05T%c", 12, 0, 25, 61, 0, NULL } }, VOL_ID, TONE_ID,
{ DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } }, DIRECT_ID, V_LAST_VAR_ID,
NB_ID
};
static struct var_t vars[NB_ID] = {
[CAPS_START_ID] = { CAPS_START, .u.s = {"\x05P8" } },
[CAPS_STOP_ID] = { CAPS_STOP, .u.s = {"\x05P5" } },
[RATE_ID] = { RATE, .u.n = {"\x05R%d", 5, 0, 9, 0, 0, NULL } },
[PITCH_ID] = { PITCH, .u.n = {"\x05P%d", 5, 0, 9, 0, 0, NULL } },
[VOL_ID] = { VOL, .u.n = {"\x05V%d", 5, 0, 9, 0, 0, NULL } },
[TONE_ID] = { TONE, .u.n = {"\x05T%c", 12, 0, 25, 61, 0, NULL } },
[DIRECT_ID] = { DIRECT, .u.n = {NULL, 0, 0, 1, 0, 0, NULL } },
V_LAST_VAR V_LAST_VAR
}; };
@ -112,10 +127,24 @@ static struct spk_synth synth_txprt = {
module_param_named(ser, synth_txprt.ser, int, 0444); module_param_named(ser, synth_txprt.ser, int, 0444);
module_param_named(dev, synth_txprt.dev_name, charp, 0444); module_param_named(dev, synth_txprt.dev_name, charp, 0444);
module_param_named(start, synth_txprt.startup, short, 0444); module_param_named(start, synth_txprt.startup, short, 0444);
module_param_named(rate, vars[RATE_ID].u.n.default_val, int, 0444);
module_param_named(pitch, vars[PITCH_ID].u.n.default_val, int, 0444);
module_param_named(vol, vars[VOL_ID].u.n.default_val, int, 0444);
module_param_named(tone, vars[TONE_ID].u.n.default_val, int, 0444);
module_param_named(direct, vars[DIRECT_ID].u.n.default_val, int, 0444);
MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based)."); MODULE_PARM_DESC(ser, "Set the serial port for the synthesizer (0-based).");
MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer."); MODULE_PARM_DESC(dev, "Set the device e.g. ttyUSB0, for the synthesizer.");
MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded."); MODULE_PARM_DESC(start, "Start the synthesizer once it is loaded.");
MODULE_PARM_DESC(rate, "Set the rate variable on load.");
MODULE_PARM_DESC(pitch, "Set the pitch variable on load.");
MODULE_PARM_DESC(vol, "Set the vol variable on load.");
MODULE_PARM_DESC(tone, "Set the tone variable on load.");
MODULE_PARM_DESC(direct, "Set the direct variable on load.");
module_spk_synth(synth_txprt); module_spk_synth(synth_txprt);

2
drivers/accessibility/speakup/spk_types.h
View file

@ -49,7 +49,7 @@ enum var_id_t {
RATE, PITCH, VOL, TONE, PUNCT, VOICE, FREQUENCY, LANG, RATE, PITCH, VOL, TONE, PUNCT, VOICE, FREQUENCY, LANG,
DIRECT, PAUSE, DIRECT, PAUSE,
CAPS_START, CAPS_STOP, CHARTAB, INFLECTION, FLUSH, CAPS_START, CAPS_STOP, CHARTAB, INFLECTION, FLUSH,
MAXVARS CUR_PHONETIC, MAXVARS
}; };
typedef int (*special_func)(struct vc_data *vc, u_char type, u_char ch, typedef int (*special_func)(struct vc_data *vc, u_char type, u_char ch,

1
drivers/accessibility/speakup/varhandlers.c
View file

@ -48,6 +48,7 @@ static struct st_var_header var_headers[] = {
{ "chartab", CHARTAB, VAR_PROC, NULL, NULL }, { "chartab", CHARTAB, VAR_PROC, NULL, NULL },
{ "direct", DIRECT, VAR_NUM, NULL, NULL }, { "direct", DIRECT, VAR_NUM, NULL, NULL },
{ "pause", PAUSE, VAR_STRING, spk_str_pause, NULL }, { "pause", PAUSE, VAR_STRING, spk_str_pause, NULL },
{ "cur_phonetic", CUR_PHONETIC, VAR_NUM, &spk_cur_phonetic, NULL },
}; };
static struct st_var_header *var_ptrs[MAXVARS] = { NULL, NULL, NULL }; static struct st_var_header *var_ptrs[MAXVARS] = { NULL, NULL, NULL };

4
drivers/bus/mhi/host/boot.c
View file

@ -118,9 +118,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl)
/* Hardware reset so force device to enter RDDM */ /* Hardware reset so force device to enter RDDM */
dev_dbg(dev, dev_dbg(dev,
"Did not enter RDDM, do a host req reset\n"); "Did not enter RDDM, do a host req reset\n");
mhi_write_reg(mhi_cntrl, mhi_cntrl->regs, mhi_soc_reset(mhi_cntrl);
MHI_SOC_RESET_REQ_OFFSET,
MHI_SOC_RESET_REQ);
udelay(delayus); udelay(delayus);
} }

25
drivers/bus/mhi/host/pci_generic.c
View file

@ -24,6 +24,10 @@
#define HEALTH_CHECK_PERIOD (HZ * 2) #define HEALTH_CHECK_PERIOD (HZ * 2)
/* PCI VID definitions */
#define PCI_VENDOR_ID_THALES 0x1269
#define PCI_VENDOR_ID_QUECTEL 0x1eac
/** /**
* struct mhi_pci_dev_info - MHI PCI device specific information * struct mhi_pci_dev_info - MHI PCI device specific information
* @config: MHI controller configuration * @config: MHI controller configuration
@ -340,6 +344,8 @@ static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0), MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0),
MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0), MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0), MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
MHI_CHANNEL_CONFIG_UL(92, "DUN2", 32, 1),
MHI_CHANNEL_CONFIG_DL(93, "DUN2", 32, 1),
MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2), MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2),
MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3), MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3),
}; };
@ -542,6 +548,8 @@ static const struct mhi_pci_dev_info mhi_telit_fn990_info = {
static const struct pci_device_id mhi_pci_id_table[] = { static const struct pci_device_id mhi_pci_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304), { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),
.driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info }, .driver_data = (kernel_ulong_t) &mhi_qcom_sdx24_info },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, PCI_VENDOR_ID_QCOM, 0x010c),
.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
/* EM919x (sdx55), use the same vid:pid as qcom-sdx55m */ /* EM919x (sdx55), use the same vid:pid as qcom-sdx55m */
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x18d7, 0x0200), { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x18d7, 0x0200),
.driver_data = (kernel_ulong_t) &mhi_sierra_em919x_info }, .driver_data = (kernel_ulong_t) &mhi_sierra_em919x_info },
@ -555,11 +563,11 @@ static const struct pci_device_id mhi_pci_id_table[] = {
.driver_data = (kernel_ulong_t) &mhi_telit_fn990_info }, .driver_data = (kernel_ulong_t) &mhi_telit_fn990_info },
{ PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0308), { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0308),
.driver_data = (kernel_ulong_t) &mhi_qcom_sdx65_info }, .driver_data = (kernel_ulong_t) &mhi_qcom_sdx65_info },
{ PCI_DEVICE(0x1eac, 0x1001), /* EM120R-GL (sdx24) */ { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1001), /* EM120R-GL (sdx24) */
.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
{ PCI_DEVICE(0x1eac, 0x1002), /* EM160R-GL (sdx24) */ { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x1002), /* EM160R-GL (sdx24) */
.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
{ PCI_DEVICE(0x1eac, 0x2001), /* EM120R-GL for FCCL (sdx24) */ { PCI_DEVICE(PCI_VENDOR_ID_QUECTEL, 0x2001), /* EM120R-GL for FCCL (sdx24) */
.driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info }, .driver_data = (kernel_ulong_t) &mhi_quectel_em1xx_info },
/* T99W175 (sdx55), Both for eSIM and Non-eSIM */ /* T99W175 (sdx55), Both for eSIM and Non-eSIM */
{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0ab), { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0ab),
@ -583,17 +591,20 @@ static const struct pci_device_id mhi_pci_id_table[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0d9), { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0d9),
.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info }, .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx65_info },
/* MV31-W (Cinterion) */ /* MV31-W (Cinterion) */
{ PCI_DEVICE(0x1269, 0x00b3), { PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00b3),
.driver_data = (kernel_ulong_t) &mhi_mv31_info }, .driver_data = (kernel_ulong_t) &mhi_mv31_info },
/* MV31-W (Cinterion), based on new baseline */ /* MV31-W (Cinterion), based on new baseline */
{ PCI_DEVICE(0x1269, 0x00b4), { PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00b4),
.driver_data = (kernel_ulong_t) &mhi_mv31_info }, .driver_data = (kernel_ulong_t) &mhi_mv31_info },
/* MV32-WA (Cinterion) */ /* MV32-WA (Cinterion) */
{ PCI_DEVICE(0x1269, 0x00ba), { PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00ba),
.driver_data = (kernel_ulong_t) &mhi_mv32_info }, .driver_data = (kernel_ulong_t) &mhi_mv32_info },
/* MV32-WB (Cinterion) */ /* MV32-WB (Cinterion) */
{ PCI_DEVICE(0x1269, 0x00bb), { PCI_DEVICE(PCI_VENDOR_ID_THALES, 0x00bb),
.driver_data = (kernel_ulong_t) &mhi_mv32_info }, .driver_data = (kernel_ulong_t) &mhi_mv32_info },
/* T99W175 (sdx55), HP variant */
{ PCI_DEVICE(0x03f0, 0x0a6c),
.driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info },
{ } { }
}; };
MODULE_DEVICE_TABLE(pci, mhi_pci_id_table); MODULE_DEVICE_TABLE(pci, mhi_pci_id_table);

3
drivers/bus/mhi/host/pm.c
View file

@ -301,7 +301,8 @@ int mhi_pm_m0_transition(struct mhi_controller *mhi_cntrl)
read_lock_irq(&mhi_chan->lock); read_lock_irq(&mhi_chan->lock);
/* Only ring DB if ring is not empty */ /* Only ring DB if ring is not empty */
if (tre_ring->base && tre_ring->wp != tre_ring->rp) if (tre_ring->base && tre_ring->wp != tre_ring->rp &&
mhi_chan->ch_state == MHI_CH_STATE_ENABLED)
mhi_ring_chan_db(mhi_cntrl, mhi_chan); mhi_ring_chan_db(mhi_cntrl, mhi_chan);
read_unlock_irq(&mhi_chan->lock); read_unlock_irq(&mhi_chan->lock);
} }

41
drivers/char/misc.c
View file

@ -61,7 +61,29 @@ static DEFINE_MUTEX(misc_mtx);
* Assigned numbers, used for dynamic minors * Assigned numbers, used for dynamic minors
*/ */
#define DYNAMIC_MINORS 128 /* like dynamic majors */ #define DYNAMIC_MINORS 128 /* like dynamic majors */
static DECLARE_BITMAP(misc_minors, DYNAMIC_MINORS); static DEFINE_IDA(misc_minors_ida);
static int misc_minor_alloc(void)
{
int ret;
ret = ida_alloc_max(&misc_minors_ida, DYNAMIC_MINORS - 1, GFP_KERNEL);
if (ret >= 0) {
ret = DYNAMIC_MINORS - ret - 1;
} else {
ret = ida_alloc_range(&misc_minors_ida, MISC_DYNAMIC_MINOR + 1,
MINORMASK, GFP_KERNEL);
}
return ret;
}
static void misc_minor_free(int minor)
{
if (minor < DYNAMIC_MINORS)
ida_free(&misc_minors_ida, DYNAMIC_MINORS - minor - 1);
else if (minor > MISC_DYNAMIC_MINOR)
ida_free(&misc_minors_ida, minor);
}
#ifdef CONFIG_PROC_FS #ifdef CONFIG_PROC_FS
static void *misc_seq_start(struct seq_file *seq, loff_t *pos) static void *misc_seq_start(struct seq_file *seq, loff_t *pos)
@ -183,14 +205,13 @@ int misc_register(struct miscdevice *misc)
mutex_lock(&misc_mtx); mutex_lock(&misc_mtx);
if (is_dynamic) { if (is_dynamic) {
int i = find_first_zero_bit(misc_minors, DYNAMIC_MINORS); int i = misc_minor_alloc();
if (i >= DYNAMIC_MINORS) { if (i < 0) {
err = -EBUSY; err = -EBUSY;
goto out; goto out;
} }
misc->minor = DYNAMIC_MINORS - i - 1; misc->minor = i;
set_bit(i, misc_minors);
} else { } else {
struct miscdevice *c; struct miscdevice *c;
@ -209,10 +230,7 @@ int misc_register(struct miscdevice *misc)
misc, misc->groups, "%s", misc->name); misc, misc->groups, "%s", misc->name);
if (IS_ERR(misc->this_device)) { if (IS_ERR(misc->this_device)) {
if (is_dynamic) { if (is_dynamic) {
int i = DYNAMIC_MINORS - misc->minor - 1; misc_minor_free(misc->minor);
if (i < DYNAMIC_MINORS && i >= 0)
clear_bit(i, misc_minors);
misc->minor = MISC_DYNAMIC_MINOR; misc->minor = MISC_DYNAMIC_MINOR;
} }
err = PTR_ERR(misc->this_device); err = PTR_ERR(misc->this_device);
@ -240,16 +258,13 @@ EXPORT_SYMBOL(misc_register);
void misc_deregister(struct miscdevice *misc) void misc_deregister(struct miscdevice *misc)
{ {
int i = DYNAMIC_MINORS - misc->minor - 1;
if (WARN_ON(list_empty(&misc->list))) if (WARN_ON(list_empty(&misc->list)))
return; return;
mutex_lock(&misc_mtx); mutex_lock(&misc_mtx);
list_del(&misc->list); list_del(&misc->list);
device_destroy(misc_class, MKDEV(MISC_MAJOR, misc->minor)); device_destroy(misc_class, MKDEV(MISC_MAJOR, misc->minor));
if (i < DYNAMIC_MINORS && i >= 0) misc_minor_free(misc->minor);
clear_bit(i, misc_minors);
mutex_unlock(&misc_mtx); mutex_unlock(&misc_mtx);
} }
EXPORT_SYMBOL(misc_deregister); EXPORT_SYMBOL(misc_deregister);

26
drivers/char/virtio_console.c
View file

@ -13,6 +13,7 @@
#include <linux/fs.h> #include <linux/fs.h>
#include <linux/splice.h> #include <linux/splice.h>
#include <linux/pagemap.h> #include <linux/pagemap.h>
#include <linux/idr.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/list.h> #include <linux/list.h>
#include <linux/poll.h> #include <linux/poll.h>
@ -48,22 +49,11 @@ struct ports_driver_data {
/* List of all the devices we're handling */ /* List of all the devices we're handling */
struct list_head portdevs; struct list_head portdevs;
/*
* This is used to keep track of the number of hvc consoles
* spawned by this driver. This number is given as the first
* argument to hvc_alloc(). To correctly map an initial
* console spawned via hvc_instantiate to the console being
* hooked up via hvc_alloc, we need to pass the same vtermno.
*
* We also just assume the first console being initialised was
* the first one that got used as the initial console.
*/
unsigned int next_vtermno;
/* All the console devices handled by this driver */ /* All the console devices handled by this driver */
struct list_head consoles; struct list_head consoles;
}; };
static struct ports_driver_data pdrvdata = { .next_vtermno = 1};
static struct ports_driver_data pdrvdata;
static DEFINE_SPINLOCK(pdrvdata_lock); static DEFINE_SPINLOCK(pdrvdata_lock);
static DECLARE_COMPLETION(early_console_added); static DECLARE_COMPLETION(early_console_added);
@ -89,6 +79,8 @@ struct console {
u32 vtermno; u32 vtermno;
}; };
static DEFINE_IDA(vtermno_ida);
struct port_buffer { struct port_buffer {
char *buf; char *buf;
@ -1244,18 +1236,21 @@ static int init_port_console(struct port *port)
* pointers. The final argument is the output buffer size: we * pointers. The final argument is the output buffer size: we
* can do any size, so we put PAGE_SIZE here. * can do any size, so we put PAGE_SIZE here.
*/ */
port->cons.vtermno = pdrvdata.next_vtermno; ret = ida_alloc_min(&vtermno_ida, 1, GFP_KERNEL);
if (ret < 0)
return ret;
port->cons.vtermno = ret;
port->cons.hvc = hvc_alloc(port->cons.vtermno, 0, &hv_ops, PAGE_SIZE); port->cons.hvc = hvc_alloc(port->cons.vtermno, 0, &hv_ops, PAGE_SIZE);
if (IS_ERR(port->cons.hvc)) { if (IS_ERR(port->cons.hvc)) {
ret = PTR_ERR(port->cons.hvc); ret = PTR_ERR(port->cons.hvc);
dev_err(port->dev, dev_err(port->dev,
"error %d allocating hvc for port\n", ret); "error %d allocating hvc for port\n", ret);
port->cons.hvc = NULL; port->cons.hvc = NULL;
ida_free(&vtermno_ida, port->cons.vtermno);
return ret; return ret;
} }
spin_lock_irq(&pdrvdata_lock); spin_lock_irq(&pdrvdata_lock);
pdrvdata.next_vtermno++;
list_add_tail(&port->cons.list, &pdrvdata.consoles); list_add_tail(&port->cons.list, &pdrvdata.consoles);
spin_unlock_irq(&pdrvdata_lock); spin_unlock_irq(&pdrvdata_lock);
port->guest_connected = true; port->guest_connected = true;
@ -1532,6 +1527,7 @@ static void unplug_port(struct port *port)
list_del(&port->cons.list); list_del(&port->cons.list);
spin_unlock_irq(&pdrvdata_lock); spin_unlock_irq(&pdrvdata_lock);
hvc_remove(port->cons.hvc); hvc_remove(port->cons.hvc);
ida_free(&vtermno_ida, port->cons.vtermno);
} }
remove_port_data(port); remove_port_data(port);

7
drivers/char/xillybus/xillybus_class.c
View file

@ -227,14 +227,15 @@ int xillybus_find_inode(struct inode *inode,
break; break;
} }
mutex_unlock(&unit_mutex); if (!unit) {
mutex_unlock(&unit_mutex);
if (!unit)
return -ENODEV; return -ENODEV;
}
*private_data = unit->private_data; *private_data = unit->private_data;
*index = minor - unit->lowest_minor; *index = minor - unit->lowest_minor;
mutex_unlock(&unit_mutex);
return 0; return 0;
} }
EXPORT_SYMBOL(xillybus_find_inode); EXPORT_SYMBOL(xillybus_find_inode);

22
drivers/char/xillybus/xillyusb.c
View file

@ -184,6 +184,14 @@ struct xillyusb_dev {
struct mutex process_in_mutex; /* synchronize wakeup_all() */ struct mutex process_in_mutex; /* synchronize wakeup_all() */
}; };
/*
* kref_mutex is used in xillyusb_open() to prevent the xillyusb_dev
* struct from being freed during the gap between being found by
* xillybus_find_inode() and having its reference count incremented.
*/
static DEFINE_MUTEX(kref_mutex);
/* FPGA to host opcodes */ /* FPGA to host opcodes */
enum { enum {
OPCODE_DATA = 0, OPCODE_DATA = 0,
@ -1237,9 +1245,16 @@ static int xillyusb_open(struct inode *inode, struct file *filp)
int rc; int rc;
int index; int index;
mutex_lock(&kref_mutex);
rc = xillybus_find_inode(inode, (void **)&xdev, &index); rc = xillybus_find_inode(inode, (void **)&xdev, &index);
if (rc) if (rc) {
mutex_unlock(&kref_mutex);
return rc; return rc;
}
kref_get(&xdev->kref);
mutex_unlock(&kref_mutex);
chan = &xdev->channels[index]; chan = &xdev->channels[index];
filp->private_data = chan; filp->private_data = chan;
@ -1275,8 +1290,6 @@ static int xillyusb_open(struct inode *inode, struct file *filp)
((filp->f_mode & FMODE_WRITE) && chan->open_for_write)) ((filp->f_mode & FMODE_WRITE) && chan->open_for_write))
goto unmutex_fail; goto unmutex_fail;
kref_get(&xdev->kref);
if (filp->f_mode & FMODE_READ) if (filp->f_mode & FMODE_READ)
chan->open_for_read = 1; chan->open_for_read = 1;
@ -1413,6 +1426,7 @@ unopen:
return rc; return rc;
unmutex_fail: unmutex_fail:
kref_put(&xdev->kref, cleanup_dev);
mutex_unlock(&chan->lock); mutex_unlock(&chan->lock);
return rc; return rc;
} }
@ -2227,7 +2241,9 @@ static void xillyusb_disconnect(struct usb_interface *interface)
xdev->dev = NULL; xdev->dev = NULL;
mutex_lock(&kref_mutex);
kref_put(&xdev->kref, cleanup_dev); kref_put(&xdev->kref, cleanup_dev);
mutex_unlock(&kref_mutex);
} }
static struct usb_driver xillyusb_driver = { static struct usb_driver xillyusb_driver = {

2
drivers/counter/stm32-lptimer-cnt.c
View file

@ -69,7 +69,7 @@ static int stm32_lptim_set_enable_state(struct stm32_lptim_cnt *priv,
/* ensure CMP & ARR registers are properly written */ /* ensure CMP & ARR registers are properly written */
ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val, ret = regmap_read_poll_timeout(priv->regmap, STM32_LPTIM_ISR, val,
(val & STM32_LPTIM_CMPOK_ARROK), (val & STM32_LPTIM_CMPOK_ARROK) == STM32_LPTIM_CMPOK_ARROK,
100, 1000); 100, 1000);
if (ret) if (ret)
return ret; return ret;

8
drivers/dio/dio.c
View file

@ -109,6 +109,12 @@ static char dio_no_name[] = { 0 };
#endif /* CONFIG_DIO_CONSTANTS */ #endif /* CONFIG_DIO_CONSTANTS */
static void dio_dev_release(struct device *dev)
{
struct dio_dev *ddev = container_of(dev, typeof(struct dio_dev), dev);
kfree(ddev);
}
int __init dio_find(int deviceid) int __init dio_find(int deviceid)
{ {
/* Called to find a DIO device before the full bus scan has run. /* Called to find a DIO device before the full bus scan has run.
@ -225,6 +231,7 @@ static int __init dio_init(void)
dev->bus = &dio_bus; dev->bus = &dio_bus;
dev->dev.parent = &dio_bus.dev; dev->dev.parent = &dio_bus.dev;
dev->dev.bus = &dio_bus_type; dev->dev.bus = &dio_bus_type;
dev->dev.release = dio_dev_release;
dev->scode = scode; dev->scode = scode;
dev->resource.start = pa; dev->resource.start = pa;
dev->resource.end = pa + DIO_SIZE(scode, va); dev->resource.end = pa + DIO_SIZE(scode, va);
@ -252,6 +259,7 @@ static int __init dio_init(void)
if (error) { if (error) {
pr_err("DIO: Error registering device %s\n", pr_err("DIO: Error registering device %s\n",
dev->name); dev->name);
put_device(&dev->dev);
continue; continue;
} }
error = dio_create_sysfs_dev_files(dev); error = dio_create_sysfs_dev_files(dev);

5
drivers/extcon/extcon-fsa9480.c
View file

@ -257,8 +257,7 @@ static irqreturn_t fsa9480_irq_handler(int irq, void *data)
return IRQ_HANDLED; return IRQ_HANDLED;
} }
static int fsa9480_probe(struct i2c_client *client, static int fsa9480_probe(struct i2c_client *client)
const struct i2c_device_id *id)
{ {
struct fsa9480_usbsw *info; struct fsa9480_usbsw *info;
int ret; int ret;
@ -370,7 +369,7 @@ static struct i2c_driver fsa9480_i2c_driver = {
.pm = &fsa9480_pm_ops, .pm = &fsa9480_pm_ops,
.of_match_table = fsa9480_of_match, .of_match_table = fsa9480_of_match,
}, },
.probe = fsa9480_probe, .probe_new = fsa9480_probe,
.id_table = fsa9480_id, .id_table = fsa9480_id,
}; };

3
drivers/extcon/extcon-max77843.c
View file

@ -189,8 +189,7 @@ static const struct regmap_irq max77843_muic_irq[] = {
static const struct regmap_irq_chip max77843_muic_irq_chip = { static const struct regmap_irq_chip max77843_muic_irq_chip = {
.name = "max77843-muic", .name = "max77843-muic",
.status_base = MAX77843_MUIC_REG_INT1, .status_base = MAX77843_MUIC_REG_INT1,
.mask_base = MAX77843_MUIC_REG_INTMASK1, .unmask_base = MAX77843_MUIC_REG_INTMASK1,
.mask_invert = true,
.num_regs = 3, .num_regs = 3,
.irqs = max77843_muic_irq, .irqs = max77843_muic_irq,
.num_irqs = ARRAY_SIZE(max77843_muic_irq), .num_irqs = ARRAY_SIZE(max77843_muic_irq),

5
drivers/extcon/extcon-rt8973a.c
View file

@ -548,8 +548,7 @@ static void rt8973a_init_dev_type(struct rt8973a_muic_info *info)
} }
} }
static int rt8973a_muic_i2c_probe(struct i2c_client *i2c, static int rt8973a_muic_i2c_probe(struct i2c_client *i2c)
const struct i2c_device_id *id)
{ {
struct device_node *np = i2c->dev.of_node; struct device_node *np = i2c->dev.of_node;
struct rt8973a_muic_info *info; struct rt8973a_muic_info *info;
@ -696,7 +695,7 @@ static struct i2c_driver rt8973a_muic_i2c_driver = {
.pm = &rt8973a_muic_pm_ops, .pm = &rt8973a_muic_pm_ops,
.of_match_table = rt8973a_dt_match, .of_match_table = rt8973a_dt_match,
}, },
.probe = rt8973a_muic_i2c_probe, .probe_new = rt8973a_muic_i2c_probe,
.remove = rt8973a_muic_i2c_remove, .remove = rt8973a_muic_i2c_remove,
.id_table = rt8973a_i2c_id, .id_table = rt8973a_i2c_id,
}; };

5
drivers/extcon/extcon-usbc-tusb320.c
View file

@ -428,8 +428,7 @@ static int tusb320_typec_probe(struct i2c_client *client,
return 0; return 0;
} }
static int tusb320_probe(struct i2c_client *client, static int tusb320_probe(struct i2c_client *client)
const struct i2c_device_id *id)
{ {
struct tusb320_priv *priv; struct tusb320_priv *priv;
const void *match_data; const void *match_data;
@ -502,7 +501,7 @@ static const struct of_device_id tusb320_extcon_dt_match[] = {
MODULE_DEVICE_TABLE(of, tusb320_extcon_dt_match); MODULE_DEVICE_TABLE(of, tusb320_extcon_dt_match);
static struct i2c_driver tusb320_extcon_driver = { static struct i2c_driver tusb320_extcon_driver = {
.probe = tusb320_probe, .probe_new = tusb320_probe,
.driver = { .driver = {
.name = "extcon-tusb320", .name = "extcon-tusb320",
.of_match_table = tusb320_extcon_dt_match, .of_match_table = tusb320_extcon_dt_match,

15
drivers/firmware/google/Kconfig
View file

@ -19,6 +19,21 @@ config GOOGLE_SMI
driver provides an interface for reading and writing NVRAM driver provides an interface for reading and writing NVRAM
variables. variables.
config GOOGLE_CBMEM
tristate "CBMEM entries in sysfs"
depends on GOOGLE_COREBOOT_TABLE
help
CBMEM is a downwards-growing memory region created by the
Coreboot BIOS containing tagged data structures from the
BIOS. These data structures expose things like the verified
boot firmware variables, flash layout, firmware event log,
and more.
This option enables the cbmem module, which causes the
kernel to search for Coreboot CBMEM entries, and expose the
memory for each entry in sysfs under
/sys/bus/coreboot/devices/cbmem-<id>.
config GOOGLE_COREBOOT_TABLE config GOOGLE_COREBOOT_TABLE
tristate "Coreboot Table Access" tristate "Coreboot Table Access"
depends on HAS_IOMEM && (ACPI || OF) depends on HAS_IOMEM && (ACPI || OF)

3
drivers/firmware/google/Makefile
View file

@ -7,5 +7,8 @@ obj-$(CONFIG_GOOGLE_MEMCONSOLE) += memconsole.o
obj-$(CONFIG_GOOGLE_MEMCONSOLE_COREBOOT) += memconsole-coreboot.o obj-$(CONFIG_GOOGLE_MEMCONSOLE_COREBOOT) += memconsole-coreboot.o
obj-$(CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY) += memconsole-x86-legacy.o obj-$(CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY) += memconsole-x86-legacy.o
# Must come after coreboot_table.o, as this driver depends on that bus type.
obj-$(CONFIG_GOOGLE_CBMEM) += cbmem.o
vpd-sysfs-y := vpd.o vpd_decode.o vpd-sysfs-y := vpd.o vpd_decode.o
obj-$(CONFIG_GOOGLE_VPD) += vpd-sysfs.o obj-$(CONFIG_GOOGLE_VPD) += vpd-sysfs.o

129
drivers/firmware/google/cbmem.c Normal file
View file

@ -0,0 +1,129 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* cbmem.c
*
* Driver for exporting cbmem entries in sysfs.
*
* Copyright 2022 Google LLC
*/
#include <linux/device.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/kobject.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include "coreboot_table.h"
struct cbmem_entry {
char *mem_file_buf;
u32 size;
};
static struct cbmem_entry *to_cbmem_entry(struct kobject *kobj)
{
return dev_get_drvdata(kobj_to_dev(kobj));
}
static ssize_t mem_read(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr, char *buf, loff_t pos,
size_t count)
{
struct cbmem_entry *entry = to_cbmem_entry(kobj);
return memory_read_from_buffer(buf, count, &pos, entry->mem_file_buf,
entry->size);
}
static ssize_t mem_write(struct file *filp, struct kobject *kobj,
struct bin_attribute *bin_attr, char *buf, loff_t pos,
size_t count)
{
struct cbmem_entry *entry = to_cbmem_entry(kobj);
if (pos < 0 || pos >= entry->size)
return -EINVAL;
if (count > entry->size - pos)
count = entry->size - pos;
memcpy(entry->mem_file_buf + pos, buf, count);
return count;
}
static BIN_ATTR_ADMIN_RW(mem, 0);
static ssize_t address_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct coreboot_device *cbdev = dev_to_coreboot_device(dev);
return sysfs_emit(buf, "0x%llx\n", cbdev->cbmem_entry.address);
}
static DEVICE_ATTR_RO(address);
static ssize_t size_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct coreboot_device *cbdev = dev_to_coreboot_device(dev);
return sysfs_emit(buf, "0x%x\n", cbdev->cbmem_entry.entry_size);
}
static DEVICE_ATTR_RO(size);
static struct attribute *attrs[] = {
&dev_attr_address.attr,
&dev_attr_size.attr,
NULL,
};
static struct bin_attribute *bin_attrs[] = {
&bin_attr_mem,
NULL,
};
static const struct attribute_group cbmem_entry_group = {
.attrs = attrs,
.bin_attrs = bin_attrs,
};
static const struct attribute_group *dev_groups[] = {
&cbmem_entry_group,
NULL,
};
static int cbmem_entry_probe(struct coreboot_device *dev)
{
struct cbmem_entry *entry;
entry = devm_kzalloc(&dev->dev, sizeof(*entry), GFP_KERNEL);
if (!entry)
return -ENOMEM;
dev_set_drvdata(&dev->dev, entry);
entry->mem_file_buf = devm_memremap(&dev->dev, dev->cbmem_entry.address,
dev->cbmem_entry.entry_size,
MEMREMAP_WB);
if (IS_ERR(entry->mem_file_buf))
return PTR_ERR(entry->mem_file_buf);
entry->size = dev->cbmem_entry.entry_size;
return 0;
}
static struct coreboot_driver cbmem_entry_driver = {
.probe = cbmem_entry_probe,
.drv = {
.name = "cbmem",
.owner = THIS_MODULE,
.dev_groups = dev_groups,
},
.tag = LB_TAG_CBMEM_ENTRY,
};
module_coreboot_driver(cbmem_entry_driver);
MODULE_AUTHOR("Jack Rosenthal <jrosenth@chromium.org>");
MODULE_LICENSE("GPL");

11
drivers/firmware/google/coreboot_table.c
View file

@ -97,12 +97,21 @@ static int coreboot_table_populate(struct device *dev, void *ptr)
if (!device) if (!device)
return -ENOMEM; return -ENOMEM;
dev_set_name(&device->dev, "coreboot%d", i);
device->dev.parent = dev; device->dev.parent = dev;
device->dev.bus = &coreboot_bus_type; device->dev.bus = &coreboot_bus_type;
device->dev.release = coreboot_device_release; device->dev.release = coreboot_device_release;
memcpy(&device->entry, ptr_entry, entry->size); memcpy(&device->entry, ptr_entry, entry->size);
switch (device->entry.tag) {
case LB_TAG_CBMEM_ENTRY:
dev_set_name(&device->dev, "cbmem-%08x",
device->cbmem_entry.id);
break;
default:
dev_set_name(&device->dev, "coreboot%d", i);
break;
}
ret = device_register(&device->dev); ret = device_register(&device->dev);
if (ret) { if (ret) {
put_device(&device->dev); put_device(&device->dev);

18
drivers/firmware/google/coreboot_table.h
View file

@ -39,6 +39,18 @@ struct lb_cbmem_ref {
u64 cbmem_addr; u64 cbmem_addr;
}; };
#define LB_TAG_CBMEM_ENTRY 0x31
/* Corresponds to LB_TAG_CBMEM_ENTRY */
struct lb_cbmem_entry {
u32 tag;
u32 size;
u64 address;
u32 entry_size;
u32 id;
};
/* Describes framebuffer setup by coreboot */ /* Describes framebuffer setup by coreboot */
struct lb_framebuffer { struct lb_framebuffer {
u32 tag; u32 tag;
@ -65,10 +77,16 @@ struct coreboot_device {
union { union {
struct coreboot_table_entry entry; struct coreboot_table_entry entry;
struct lb_cbmem_ref cbmem_ref; struct lb_cbmem_ref cbmem_ref;
struct lb_cbmem_entry cbmem_entry;
struct lb_framebuffer framebuffer; struct lb_framebuffer framebuffer;
}; };
}; };
static inline struct coreboot_device *dev_to_coreboot_device(struct device *dev)
{
return container_of(dev, struct coreboot_device, dev);
}
/* A driver for handling devices described in coreboot tables. */ /* A driver for handling devices described in coreboot tables. */
struct coreboot_driver { struct coreboot_driver {
int (*probe)(struct coreboot_device *); int (*probe)(struct coreboot_device *);

8
drivers/firmware/raspberrypi.c
View file

@ -288,9 +288,11 @@ static int rpi_firmware_probe(struct platform_device *pdev)
fw->cl.tx_block = true; fw->cl.tx_block = true;
fw->chan = mbox_request_channel(&fw->cl, 0); fw->chan = mbox_request_channel(&fw->cl, 0);
if (IS_ERR(fw->chan)) if (IS_ERR(fw->chan)) {
return dev_err_probe(dev, PTR_ERR(fw->chan), int ret = PTR_ERR(fw->chan);
"Failed to get mbox channel\n"); kfree(fw);
return dev_err_probe(dev, ret, "Failed to get mbox channel\n");
}
init_completion(&fw->c); init_completion(&fw->c);
kref_init(&fw->consumers); kref_init(&fw->consumers);

11
drivers/fpga/Kconfig
View file

@ -265,4 +265,15 @@ config FPGA_MGR_MICROCHIP_SPI
programming over slave SPI interface with .dat formatted programming over slave SPI interface with .dat formatted
bitstream image. bitstream image.
config FPGA_MGR_LATTICE_SYSCONFIG
tristate
config FPGA_MGR_LATTICE_SYSCONFIG_SPI
tristate "Lattice sysCONFIG SPI FPGA manager"
depends on SPI
select FPGA_MGR_LATTICE_SYSCONFIG
help
FPGA manager driver support for Lattice FPGAs programming over slave
SPI sysCONFIG interface.
endif # FPGA endif # FPGA

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