soc: qcom: Add support to register LLCC EDAC driver

Cache error reporting controller detects and reports single and
double bit errors on Last Level Cache Controller (LLCC) cache.
Add required support to register LLCC EDAC driver as platform driver,
from LLCC driver.

Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org>
Reviewed-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Venkata Narendra Kumar Gutta 2018-09-12 11:06:33 -07:00 committed by Andy Gross
parent 7f9c136216
commit c081f3060f
2 changed files with 18 additions and 2 deletions

View file

@ -78,6 +78,7 @@ struct llcc_slice_config {
* @num_banks: Number of llcc banks
* @bitmap: Bit map to track the active slice ids
* @offsets: Pointer to the bank offsets array
* @ecc_irq: interrupt for llcc cache error detection and reporting
*/
struct llcc_drv_data {
struct regmap *regmap;
@ -89,6 +90,7 @@ struct llcc_drv_data {
u32 num_banks;
unsigned long *bitmap;
u32 *offsets;
int ecc_irq;
};
#if IS_ENABLED(CONFIG_QCOM_LLCC)